Multi-value nonvolatile semiconductor memory device equipped...

Details Multi-value nonvolatile semiconductor memory device equipped... Multi-value nonvolatile semiconductor memory device equipped...

2007-12-11

2007-12-11

Tran, Andrew Q. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185200, C365S185030, C365S185130, C365S185110

Reexamination Certificate

active

11063999

ABSTRACT:
A nonvolatile semiconductor memory device includes a plurality of memory cells holding memory cell information, a plurality of bit lines connected to the plurality of memory cells, the plurality of bit lines including a first bit line conected to a selected one of the plurality of memory cells and a plurality of second bit lines connected to non-selected memory cells, a plurality of reference cells supplying different reference currents respectively, and a read-out circuit, wherein, when reading the memory cell information, the read-out circuit is coupled to the first bit line connected to the selected memory cell and coupled to one of the plurality of reference cells through one of the plurality of second bit lines connected to the non-selected memory cells.

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English translation of JP-2002 008386, published Jan. 11, 2002, 127 pages.

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