Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2004-01-13
2004-11-23
Auduong, Gene N. (Department: 2818)
Static information storage and retrieval
Floating gate
Multiple values
C365S185240, C365S185330
Reexamination Certificate
active
06822898
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a nonvolatile semiconductor memory device such as a flash memory. More particularly, the present invention relates to a multi-value nonvolatile semiconductor memory device which stores multi-value data in a memory cell.
BACKGROUND OF THE INVENTION
Nonvolatile semiconductor memory devices, such as EPROM's, EEPROM's and flash memories, having a floating gate are widely used. Although description is given below using a flash memory as an example, the present invention can be applied to any nonvolatile semiconductor memory device, not limited to this, as long as it has a floating gate.
In a conventional semiconductor memory device, it is usual for each memory cell to store one of two values, that is, either “0” or “1”, but in recent nonvolatile semiconductor memory devices, the trend is for each memory cell to store one of more than two values, for example, four values, that is, “00”, “01”, “10”, or “11”, so that the memory capacity can be increased without an increase in the number of memory cells. The present invention relates to such a multi-value nonvolatile semiconductor memory device that stores one of multiple values in each memory cell and that can be applied to any case where one of an arbitrary number of values is stored, but description is given below using a case where one of four values is stored as an example. In the description below, a multi-value nonvolatile semiconductor memory device is simply referred to as a multi-value memory.
A multi-value memory has a floating gate and the gate voltage (voltage of the control gate) at which a memory cell (transistor) is brought into the ON-state is changed by changing the quantity of charges (electrons) to be injected into the floating gate. A gate voltage at which a memory cell is brought into the ON-state is referred to as a threshold value here. In a multi-value memory, multiple boundary values are specified for a threshold value and a data value is assigned according to which area the threshold value belongs to, among the multiple areas specified by these boundary values. For example, in a case where the threshold value changes from 0V to 5V and four values are stored, first a boundary value of 2.5V, which is a half of 5V, is set so that the area is divided into two equal areas, and then two boundary values of 1.25V and 3.75V, which are the middle values in the divided two areas, respectively, are set so that each divided area is further divided into two areas, and thus the original area is divided into four equal areas. Then, for example, when the threshold value of a transistor is less than 1.25V, data “00” is assigned, and when between 1.25V and 2.5V, data “01”, when between 2.5V and 3.75V, data “10”, and when greater than 3.75V, data “11” is assigned. In this manner, each memory cell stores one of four values (that is, two bits). Generally, boundary values are set at equal intervals in a multi-value memory, as described above, because the algorithm of the write operation is simple.
FIG. 1
is a diagram that illustrates setting of boundary values and margins in a conventional multi-value memory. As described above, boundary values VT
1
, VT
2
and VT
3
are set at equal intervals and a data value is assigned to each of the four areas, respectively, which are divided by the boundary values VT
1
, VT
2
and VT
3
.
Before data is written, an erase operation is performed that brings about a state in which the threshold value is V0 by removing charges once from the floating gate. V0 is a value far smaller than the lowest boundary value VT
1
and is about 0V in the above-mentioned case. After the erase operation the write operation is performed, but when the write data is “00”, a write operation is not performed. This means that the threshold value of data “00” is V0, which corresponds to an erased state. When writing other data, the threshold value is detected after performing the write operation in which charges are injected into the floating gate little by little, and whether the lower limit threshold value of the write data is exceeded is checked. This action is repeated until the lower limit threshold value is exceeded, and when the lower limit threshold value is exceeded, charges are injected into the floating gate under a fixed condition so that the threshold value is increased by A. The threshold value A to be increased is determined so that the upper limit boundary value is not exceeded with variations in elements being taken into consideration. The threshold value A to be increased is the same regardless of the boundary values.
In the write operation described above, if the quantity of charges to be injected into the floating gate in one write operation is large, an error is produced, the maximum of which corresponds to the increment in the threshold value from the lower limit threshold value in one write operation, when it is detected that the threshold value is exceeded and, therefore, the smaller the quantity of charges to be injected into the floating gate in one write operation, the smaller the error. However, there occurs a problem that if the quantity of charges to be injected in one write operation is small, the number of times of repetition increases and the period of time required for the write operation is lengthened accordingly. Therefore, a method is adopted, in which as large a quantity of charge as possible but a quantity that ensures that the lower limit in the target range is not exceeded is injected the first time, then the above-mentioned operation is repeated while a small quantity of charges are injected each time.
Whether the threshold value exceeds the lower limit boundary value is detected by applying the voltage of the lower limit boundary value to the gate and judging whether the transistor is brought into the ON-state.
There are some cases where whether the threshold value exceeds the value that is the lower limit boundary value in the target range added by A is detected, instead of increasing the threshold value by A, by performing a fixed write operation after the threshold value exceeds the lower limit boundary value in the target range.
When the stored multi-value data is read, first, the boundary value VT
2
is applied to the gate and whether the transistor is brought into the ON-state is detected. If it is brought into the ON-state, the boundary value VT
1
is applied to the gate and whether the transistor is brought into the ON-state is detected, and if it is brought into the ON-state, the data is judged to be “00”, and if it is brought into the OFF-state, the data is judged to be “01”. If the application of VT
2
brings the transistor into the OFF-state, then whether the application of the boundary value VT
3
to the gate brings the transistor into the ON-state is detected, and if it is brought into the ON-state, the data is judged to be “10” and if it is brought into the OFF-state, the data is judged to be “11”. In this case, as the voltage of the boundary value is applied twice to the gate, the read time is lengthened. Therefore, there are some cases where the current when a fixed voltage is applied is detected as a threshold value and it is compared with the three boundary values in parallel. The present invention can be applied to any one of the cases.
The charges injected into the floating gate eventually leak, although gradually. When it is assumed that the leak current is i, the quantity of charges within the floating gate is Q, the capacitance of the floating gate is C, and the voltage of the floating gate is V, they are expressed by the following relationship
i=−dQ/dt=−C×dV/dt
The voltage V of the floating gate is proportional to the threshold voltage. On the other hand, when the leak resistance is assumed to be R, then i=V/R, and when this is substituted into the above-mentioned expression, the following expression is obtained
V=−CR×dV/dt
Therefore, when the initial threshold value is assumed to be VS, the following expression is obtained
V&equal
Arent & Fox PLLC
Auduong Gene N.
Fujitsu Limited
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