Multi-value level type non-volatile semiconductor memory unit an

Static information storage and retrieval – Floating gate – Multiple values

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36518524, 36518529, G11C 1134

Patent

active

056687567

ABSTRACT:
A non-volatile semiconductor memory unit comprises a memory cell having a semiconductor substrate, a control gate formed over the semiconductor substrate, an electric charge accumulative layer formed between the semiconductor substrate and the control gate, and a source and drain, both formed in the semiconductor substrate. The memory cell stores N-valued data (N being an integer more than 3) by accumulating an electric charge in the electric charge accumulative layer. A detector is provided for detecting a storage state before data rewrite of the memory cell. A comparison circuit compares the storage state before data rewrite, with a storage state after data rewrite to produce a difference therebetween. A rewrite circuit is included for rewriting the storage state of the memory cell by applying N-1 levels of predetermined voltages to the source, the drain and control gate of the memory cell, respectively, in accordance with the produced difference.

REFERENCES:
patent: 5043940 (1991-08-01), Harari
patent: 5379256 (1995-01-01), Tanaka et al.
1992, Autumnal 53rd Convention Report of the Japan Society of Applied Physics, p. 653.

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