Electrical computers and digital processing systems: processing – Instruction issuing
Reexamination Certificate
2011-05-10
2011-05-10
Fennema, Robert (Department: 2183)
Electrical computers and digital processing systems: processing
Instruction issuing
Reexamination Certificate
active
07941643
ABSTRACT:
A system, apparatus and method for an interleaving multi-thread processing device are described herein. The multi-thread processing device includes an execution block to execute instructions and a fetch block to fetch and issue instructions, interleavingly, of a first instruction execution thread and at least one other instruction execution thread. The fetch block includes at least one program counter, which is allocable and/or corresponds to each instruction execution thread.
REFERENCES:
patent: 6295600 (2001-09-01), Parady
patent: 7360064 (2008-04-01), Steiss et al.
patent: 2003/0023835 (2003-01-01), Kalafatis et al.
patent: 2004/0148606 (2004-07-01), Hosoe
patent: 2007/0174372 (2007-07-01), Feghali et al.
patent: 2007/0204137 (2007-08-01), Tran
Matz, Kevin. “Calling Interrupts”. 1997, pp. 1-7.
Chuang Yu-Chi
Kang Jack
Fennema Robert
Marvell World Trade Ltd.
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