Electrical computers and digital processing systems: multicomput – Network-to-computer interfacing
Reexamination Certificate
2000-02-02
2002-06-18
Sheikh, Ayaz (Department: 2155)
Electrical computers and digital processing systems: multicomput
Network-to-computer interfacing
C370S902000
Reexamination Certificate
active
06408341
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
This invention relates to a data communication system and pertains, more particularly, to a network adapter that provides separate FIFO buffers optimized for separate multimedia tasks.
2. Background Art
In multiple protocol applications, and especially in the demanding area of multimedia serving applications, there can exist many different types of traffic, including, for example, large, lower priority multimedia data messages; small, high priority multimedia control messages; medium sized, high priority messages associated with high-level protocols such as TCP/IP; and small, high priority messages that the device drivers on the various nodes within the system use for coordination of activities.
In a distributed multimedia server design, the dominant message flow usually includes small control messages from a data consumer to a data provider which, in turn, responds with a large video (or audio) data block back to the data consumer. Even at 25 megabytes per second a large piece of video data (64 KB or more) will take nearly 3 milliseconds to transmit. Therefore, there is a need in the art for a communications adapter which, under heavy server load conditions, with possible contention (blocking) in the switch fabric as well, prevents large message blocks from impeding the small, higher priority control messages that should be sent and received expeditiously.
In accordance with one system, data is transferred between a telephone system and a computer. A single send, or transmit, FIFO buffer and a single receive FIFO buffer are used to adapt the speed of the telephone lines to the computer transfer rate. This system requires two microprocessors with memory and code, one to control the send buffer and one to control the receive buffer. This system can connect to multiple telephone lines using multiple adapters, a unique adapter for each telephone line, with each adapter consisting of a pair of FIFO buffers, a pair of microprocessors, and code.
In another system, data transfer is provided between remote peripherals and a computer. Each line adapter to each peripheral is unique, and is specially designed to operate to suit the characteristics of a particular type of remote terminal or station.
In several other systems, an adapter is provided between a computer and a communications network, such as a local area network (LAN), that works at a high data rate, by providing a single adapter to the network comprising a pair of FIFO buffers, one each for send and receive. In one such system, two microprocessors with memory and control code are provided, one for handling buffer management and the other for handling medium access control. In another, time-slotted transmissions are provided for handling digital voice and data telephone applications.
None of these systems provide a communications adapter which provides multiple send and receive FIFO buffers in a single adapter for handling multiple, high speed, logical connections through a single adapter to a single network. There is, therefore, a need to provide a single adapter which interconnects multiple processors through a network, which uses direct memory access (DMA), and avoids the use of slower multiplexing, or time-slotting, of data and control.
It is, therefore, an object of the invention to provide a communications adapter for multiple protocol applications which, inter alia, efficiently handles communications within a multimedia serving application.
It is a further object of the invention to provide a communications adapter which, under heavy server load conditions, with possible contention (blocking) in the switch fabric as well, prevents large message blocks from impeding the small, higher priority control messages that should be sent and received expeditiously.
SUMMARY OF THE INVENTION
The multiple FIFO method and priority control logic of the present invention supports the different types of message traffic, both send and receive, that comprise a multimedia server system.
In accordance with this invention, a communications apparatus is provided comprising a plurality of FIFO buffers, each with independent control and priority logic under software control. The software directs messages to specific, optimized FIFO buffers. In accordance with a further aspect of this invention, the apparatus of the invention is implemented in a system including a plurality of nodes, wherein a sending node specifies the communications path through the system by selecting specific FIFO buffers in each node for buffering its messages.
In accordance with a further aspect of this invention, a method is provided for operating an adapter interconnecting a nodal processor to a network, the adapter including a plurality of addressable FIFO buffers for storing and forwarding messages. The method includes the steps of (1) assigning a priority level to each said FIFO buffer; and (2) responsive to the priority level, determining which sending FIFO buffer is to forward a first next message to the network, and determining which receive FIFO buffer is to store a second next message received from the network.
Other features and advantages of this invention will become apparent from the following detailed description of the presently preferred embodiment of the invention, taken in conjunction with the accompanying drawings.
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Feeney James William
Olnowich Howard Thomas
Wilhelm, Jr. George William
Beckstrand Shelley M
Dinh Khanh Quang
International Business Machines - Corporation
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