Multi-stream FFT for MIMO-OFDM systems

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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07552161

ABSTRACT:
The present invention proposes a signal processor for Fast Fourier Transformation, FFT, of MR, MR>1, input data streams of 2ksamples each, supplied in parallel. After multiplexing the input data streams in an interlaced manner, the resulting stream is subjected to FFT. The FFT device has a pipeline architecture composed of k stages with a respective feedback path including a single delay element per each stage of the pipeline architecture. The delay element and timing signals are adapted to cope with FFT processing of the multiplexed streams using the single FFT device only. After processing, the FFT processed data stream is demultiplexed. The present invention also concerns a corresponding signal processing method.

REFERENCES:
patent: 2004/0059766 (2004-03-01), Yeh
patent: 2004/0136349 (2004-07-01), Walton et al.
patent: 2004/0252632 (2004-12-01), Bourdoux et al.
patent: 2006/0167964 (2006-07-01), Balakrishnan et al.
Shousheng He et al., “A New Approach to Pipeline FFT Processor”, Apr. 15, 1996, Parallel Processing Symposium, Proceedings of IPPS '96, pp. 766-770.

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