Multi-state read-only memory using multiple polysilicon selectiv

Details Multi-state read-only memory using multiple polysilicon selectiv Multi-state read-only memory using multiple polysilicon selectiv

1995-09-19

1996-08-13

Chaudhari, Chandra

Fishing, trapping, and vermin destroying

437 45, 437154, H01L 218246

Patent

active

055455808

ABSTRACT:
A multi-state read-only-memory device and a method for fabricating the same is suitable for forming on a semiconductor substrate. The read-only memory device is provided with bit lines and word lines which are mutually intersecting. In accordance with the present invention, multiple polysilicon selective deposition procedures are utilized to form a plurality of protrusion portions onto the word lines but with multiple thicknesses. Then, one implantation procedure is applied to program the device into multiple states at the same time without incurring misalignment problems that result in inaccuracy.

REFERENCES:
patent: 5091324 (1992-02-01), Hsu et al.
patent: 5278078 (1994-01-01), Kanebako et al.
patent: 5372961 (1994-12-01), Noda

Affiliated with

Also associated with

Rating

Multi-state read-only memory using multiple polysilicon selectiv does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-state read-only memory using multiple polysilicon selectiv, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-state read-only memory using multiple polysilicon selectiv will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1047712