Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2005-08-02
2005-08-02
Smoot, Stephen W. (Department: 2813)
Static information storage and retrieval
Floating gate
Particular connection
C365S185280
Reexamination Certificate
active
06925007
ABSTRACT:
Non-volatile memory cells store a level of charge corresponding to the data being stored in a dielectric material storage element that is sandwiched between a control gate and the semiconductor substrate surface over channel regions of the memory cells. More than two memory states are provided by one of more than two levels of charge being stored in a common region of the dielectric material. More than one such common region may be included in each cell. In one form, two such regions are provided adjacent source and drain diffusions in a cell that also includes a select transistor positioned between them. In another form, NAND arrays of strings of memory cells store charge in regions of a dielectric layer sandwiched between word lines and the semiconductor substrate.
REFERENCES:
patent: 3979582 (1976-09-01), Mims
patent: 4057788 (1977-11-01), Sage
patent: 4112507 (1978-09-01), White et al.
patent: 4173766 (1979-11-01), Hayes
patent: 4398248 (1983-08-01), Hsia et al.
patent: 4527257 (1985-07-01), Cricchi
patent: 4622656 (1986-11-01), Kamiya et al.
patent: 4870470 (1989-09-01), Bass, Jr. et al.
patent: 5043940 (1991-08-01), Harari
patent: 5070032 (1991-12-01), Yuan et al.
patent: 5095344 (1992-03-01), Harari
patent: 5168334 (1992-12-01), Mitchell et al.
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5278439 (1994-01-01), Ma et al.
patent: 5311049 (1994-05-01), Tsuruta
patent: 5313421 (1994-05-01), Guterman et al.
patent: 5315541 (1994-05-01), Harari et al.
patent: 5343063 (1994-08-01), Yuan et al.
patent: 5424978 (1995-06-01), Wada et al.
patent: 5426605 (1995-06-01), Van Berkel et al.
patent: 5436481 (1995-07-01), Egawa et al.
patent: 5440505 (1995-08-01), Fazio et al.
patent: 5539690 (1996-07-01), Talreja et al.
patent: 5661053 (1997-08-01), Yuan
patent: 5712180 (1998-01-01), Guterman et al.
patent: 5768192 (1998-06-01), Eitan
patent: 5824584 (1998-10-01), Chen et al.
patent: 5851881 (1998-12-01), Lin et al.
patent: 5887145 (1999-03-01), Harari et al.
patent: 5889303 (1999-03-01), Eckert et al.
patent: 5912844 (1999-06-01), Chen et al.
patent: 5946231 (1999-08-01), Endoh et al.
patent: 5969383 (1999-10-01), Chang et al.
patent: 6011725 (2000-01-01), Eitan
patent: 6030871 (2000-02-01), Eitan
patent: 6046935 (2000-04-01), Takeuchi et al.
patent: 6054734 (2000-04-01), Aozasa et al.
patent: 6091633 (2000-07-01), Cernea et al.
patent: 6101125 (2000-08-01), Gorman
patent: 6103573 (2000-08-01), Harari et al.
patent: 6104072 (2000-08-01), Hirota
patent: 6137718 (2000-10-01), Reisinger
patent: 6151248 (2000-11-01), Harari et al.
patent: 6177318 (2001-01-01), Ogura et al.
patent: 6181597 (2001-01-01), Nachumovsky
patent: 6201282 (2001-03-01), Eitan
patent: 6215148 (2001-04-01), Eitan
patent: 6215702 (2001-04-01), Derhacobian et al.
patent: 6222762 (2001-04-01), Guterman et al.
patent: 6248633 (2001-06-01), Ogura et al.
patent: 6255166 (2001-07-01), Ogura et al.
patent: 6266281 (2001-07-01), Derhacobian et al.
patent: 6281075 (2001-08-01), Yuan et al.
patent: 6313503 (2001-11-01), Lee et al.
patent: 6331952 (2001-12-01), Wang et al.
patent: 6331953 (2001-12-01), Wang et al.
patent: 6346725 (2002-02-01), Ma et al.
patent: 6349062 (2002-02-01), Thurgate
patent: 6366501 (2002-04-01), Thurgate et al.
patent: 6388293 (2002-05-01), Ogura et al.
patent: 6399441 (2002-06-01), Ogura et al.
patent: 6406960 (2002-06-01), Hopper et al.
patent: 6413821 (2002-07-01), Ebina et al.
patent: 6418062 (2002-07-01), Hayashi et al.
patent: 6436768 (2002-08-01), Yang et al.
patent: 6445030 (2002-09-01), Wu et al.
patent: 6456528 (2002-09-01), Chen
patent: 6459622 (2002-10-01), Ogura et al.
patent: 6472706 (2002-10-01), Widdershoven et al.
patent: 6477088 (2002-11-01), Ogura et al.
patent: 6487121 (2002-11-01), Thurgate et al.
patent: 6493266 (2002-12-01), Yachareni et al.
patent: 6531350 (2003-03-01), Satoh et al.
patent: 6531732 (2003-03-01), Sugita et al.
patent: 6548861 (2003-04-01), Palm et al.
patent: 6549463 (2003-04-01), Ogura et al.
patent: 6552387 (2003-04-01), Eitan
patent: 6555865 (2003-04-01), Lee et al.
patent: 6580120 (2003-06-01), Haspeslagh
patent: 6583007 (2003-06-01), Eitan
patent: 6636438 (2003-10-01), Ogura et al.
patent: 6670240 (2003-12-01), Ogura et al.
patent: 6670669 (2003-12-01), Kawamura
patent: 6677200 (2004-01-01), Lee et al.
patent: 6709922 (2004-03-01), Ebina et al.
patent: 6735118 (2004-05-01), Ogura et al.
patent: 2001/0021126 (2001-09-01), Lavi et al.
patent: 2001/0055838 (2001-12-01), Walker et al.
patent: 2002/0064911 (2002-05-01), Eitan
patent: 2002/0105023 (2002-08-01), Kuo et al.
patent: 2002/0118574 (2002-08-01), Gongwer et al.
patent: 2002/0130350 (2002-09-01), Shin et al.
patent: 2002/0196665 (2002-12-01), Kim
patent: 2003/0016561 (2003-01-01), Lee et al.
patent: 2003/0030097 (2003-02-01), Lee et al.
patent: 2003/0057435 (2003-03-01), Walker
patent: 2003/0080370 (2003-05-01), Harari et al.
patent: 2003/0080372 (2003-05-01), Mikolajick
patent: 2003/0081456 (2003-05-01), Mikolajick
patent: 2003/0081460 (2003-05-01), Choi et al.
patent: 2003/0099144 (2003-05-01), Kim et al.
patent: 2003/0123307 (2003-07-01), Lee et al.
patent: 2003/0134476 (2003-07-01), Roizin et al.
patent: 2003/0193827 (2003-10-01), Choi
patent: 2003/0198104 (2003-10-01), Lee
patent: 2003/0209754 (2003-11-01), Haspeslagh
patent: 2003/0211689 (2003-11-01), Yoo et al.
patent: 2003/0219947 (2003-11-01), Shin et al.
patent: 2003/0224564 (2003-12-01), Kang et al.
patent: 2004/0000688 (2004-01-01), Harari et al.
patent: 2004/0009642 (2004-01-01), Yoo et al.
patent: 2004/0009645 (2004-01-01), Yoo
patent: 1 073 120 (2001-01-01), None
patent: 1 091 418 (2001-04-01), None
patent: 1 096 505 (2001-05-01), None
patent: 1376676 (2004-02-01), None
patent: 58-102394 (1983-05-01), None
patent: 11-224940 (1999-08-01), None
patent: 960953 (1982-09-01), None
patent: WO01/13378 (2001-02-01), None
patent: WO03/015173 (2003-02-01), None
Aritome, Seiichi, et al., “A Novel Side-Wall Transfer Transistor Cell (Swatt Cell) for Multi-Level NAND EEProms”, 1995 IEEE International Solid-State Circuits Conference, IEDM 95, pp. 275-278.
Jan Van Houdt et al., “Multiple Bit Nonvolatile Memory Device and Method for Fabricating the Same”, U.S. Appl. No. 60/391,565, filed Jun. 24, 2002, priority claimed by EP1376676.
Luc Haspeslagh, “Two Bit Non-Volatile Electrically Erasable and Programmable Memory Structure, a Process for Producing Said Memory Structure and Methods for Programming and Erasing Said Memory Structure”, U.S. Appl. No. 60/296,618, filed Jun. 7, 2001, priority claimed by U.S. 6,580,120.
Krick, P.J., “Dual-Level Sense Scheme for Composite Insulator Memory Arrays”, IBM technical Disclosure Bulletin, vol. 17, No. 6, Nov. 1974, pp. 1811-1813.
Lai, S.K. et al., “Comparison and Trends in Today's Dominant E2 Technologies”, IEEE, IEDM 86, 1986, pp. 580-583.
Examiner Jennifer M. Dolan, Office Action dated Apr. 5, 2004, U.S. Appl. No. 10/161,235, 19 pages.
“Notification of Transmittal of the International Search Report of the Declaration”, corresponding PCT application No. PCT/US02/35132, International Searching Authority, Mar. 21, 2003, 4 pages.
S. Ogura et al., “Low Voltage, Low Current, High Speed Program Step Split Gate Cell With Ballistic Direct Injection for EEPROM/Flash”, 1998 IEDM Technical Digest, 36.5, pp. 987-990.
F.I. Hampton et al., “Space Charge Distribution Limitation on Scale Down of MNOS Memory Devices”, 1979, IEDM Technical Digest, pp. 374-377.
Eiichi Suzuki et al., “A Low-Voltage Alterable EEPROM With Metal-Oxide-Nitride-Oxide- Semiconductor (MONOS) Structures”, IEEE Transactions on Electron Devices, vol. ED-30, No. 2, Feb., pp. 122-128, 1983.
Y. Tarui et al., “Electrically Reprogrammable Nonvolatile Semiconductor Memory”, IEEE Journal of Solid State Circuits, vol., SC-7, No. 5, Oct. 1972, pp. 369-375.
Boaz Eitan et al., “Can NROM, a 2 Bit Trapping Storage NMV Cell, Give a Real Challenge to Floating Gate Cells?”, Extended Abstracts, 1999 Conference on Solid Sta
Guterman Daniel C.
Harari Eliyahou
Samachisa George
Yuan Jack H.
Parsons Hsue & de Runtz LLP
SanDisk Corporation
Smoot Stephen W.
LandOfFree
Multi-state non-volatile integrated circuit memory systems... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multi-state non-volatile integrated circuit memory systems..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-state non-volatile integrated circuit memory systems... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3520884