Multi-state EEPROM having write-verify control circuit

Details Multi-state EEPROM having write-verify control circuit Multi-state EEPROM having write-verify control circuit

2006-06-13

2009-12-01

Tran, Andrew Q (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185210, C365S185180, C365S185170, C365S185030, C365S185120

Reissue Patent

active

RE041021

ABSTRACT:
An EEPROM having a memory cell array in which electrically programmable memory cells are arranged in a matrix and each of the memory cells has three storage states, includes a plurality of data circuits for temporarily storing data for controlling write operation states of the plurality of memory cells, a write circuit for performing a write operation in accordance with the contents of the data circuits respectively corresponding to the memory cells, a write verify circuit for confirming states of the memory cells set upon the write operation, and a data updating circuit for updating the contents of the data circuits such that a rewrite operation is performed to only a memory cell, in which data is not sufficiently written, on the basis of the contents of the data circuits and the states of the memory cells set upon the write operation. A write operation, a write verify operation, and a data circuit content updating operation based on the contents of the data circuits are repeatedly performed until the memory cells are set in predetermined written states.

REFERENCES:
patent: 4057788 (1977-11-01), Sage
patent: 4279024 (1981-07-01), Schrenk
patent: 5146106 (1992-09-01), Anderson et al.
patent: 5168465 (1992-12-01), Harari
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5218569 (1993-06-01), Banks
patent: 5321699 (1994-06-01), Endoh et al.
patent: 5339270 (1994-08-01), Jiang
patent: 5394362 (1995-02-01), Banks
patent: 5412599 (1995-05-01), Daniele et al.
patent: 5521865 (1996-05-01), Ohuchi et al.
patent: 5652719 (1997-07-01), Tanaka et al.
patent: 5781478 (1998-07-01), Takeuchi et al.
patent: 5920507 (1999-07-01), Takeuchi et al.
patent: 6005815 (1999-12-01), Nakano
patent: 6069823 (2000-05-01), Takeuchi et al.
patent: 6147911 (2000-11-01), Takeuchi et al.
patent: 6570796 (2003-05-01), Sung
patent: 42 32 025 (1993-04-01), None
patent: 58-86777 (1983-05-01), None
patent: 62-257699 (1987-11-01), None
patent: 1-23878 (1989-05-01), None
patent: 1-46949 (1989-10-01), None
patent: 2-232900 (1990-09-01), None
patent: 2-260298 (1990-10-01), None
patent: 3-59886 (1991-03-01), None
patent: 3-237692 (1991-10-01), None
patent: 3-286497 (1991-12-01), None
patent: 4-88671 (1992-03-01), None
patent: 4-119594 (1992-04-01), None
patent: 4-254994 (1992-09-01), None
patent: 4-507320 (1992-12-01), None
patent: 5-6681 (1993-01-01), None
patent: 5-144277 (1993-06-01), None
patent: 5-182476 (1993-07-01), None
patent: 5-60199 (1993-09-01), None
patent: 2007-184102 (2007-07-01), None
patent: 2007-184103 (2007-07-01), None

Affiliated with

Also associated with

Rating

Multi-state EEPROM having write-verify control circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-state EEPROM having write-verify control circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-state EEPROM having write-verify control circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4118617