Multi-standard variable block size motion estimation processor

Details Multi-standard variable block size motion estimation processor Multi-standard variable block size motion estimation processor

2008-03-11

2008-03-11

Philippe, Gims (Department: 2621)

Pulse or digital communications

Bandwidth reduction or expansion

Television or motion video signal

C382S236000

Reexamination Certificate

active

07342964

ABSTRACT:
An apparatus generally having a first circuit, a second circuit and a third circuit is disclosed. The first circuit may be configured to generate a plurality of difference values by calculating an absolute difference between each pixel from a current block and a corresponding pixel from a reference block substantially simultaneously. The second circuit may be configured to generate a plurality of sum values by adding the difference values. The third circuit may be configured to generate at least one motion vector in response to the sum values.

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