Multi-standard channel decoder

Details Multi-standard channel decoder Multi-standard channel decoder

2005-03-01

2005-03-01

Chin, Stephen (Department: 2634)

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

C375S344000, C348S607000, C348S555000, C348S725000, C348S554000, C712S036000, C725S148000, C455S247100

Reexamination Certificate

active

06862325

ABSTRACT:
The invention relates to a multi-standard digital receiver, in a digital video transmission system. It comprises a channel decoder for protecting a transmitted signal against channel transmission errors, the channel decoder comprising:a set of co-processors including at least 3 clusters of programmable co-processors for executing the functions of a digital front-end block (DFE), a channel correction block (CHN) and a forward error correction block (FEC), respectively,a general purpose processor (DSP) for managing control, synchronization and configuration of the channel decoder, anda memory (SM) shared between the clusters and the general purpose processor.

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patent: 0966157 (1999-12-01), None

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