Multi-stage pass transistor shifter/rotator

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364715, G06F 700

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active

045831971

ABSTRACT:
A digital shifter/rotator for shifting an input word by an amount depending on a shift control word is described. The shifter/rotator comprises an array of FET pass transistors arranged in a sequential number of stages. The amount to be shifted in each stage is controlled by a corresponding shift control bit of the shift control word, whereby the output word of the rotator is the input word shifted by an amount equal to a sum of the number of shifts effected in each of the stages as determined by the shift control word. The rotator features selectable amount of shift in one machine cycle, high performance and reduced device count. Further improved performance is obtained by utilizing decoupling devices for isolating the input points of the stages, except when providing rotation, from the long rotation cross buses and its associated large parasitic capacitances.

REFERENCES:
patent: 3810115 (1974-05-01), Stafford
patent: 4122534 (1978-10-01), Cesaratto
patent: 4383304 (1983-05-01), Hirashima
patent: 4396994 (1983-08-01), Kang et al.
patent: 4472788 (1984-09-01), Yamazaki
Mead, "Introduction to VLSI Systems" Addison-Wesley, pp. 157-162, 1980.
Gersbach "Algebraic/Logical Shift Matrix" IBM Tech. Disclosure Bulletin, vol. 23, No. 1, Jun. 1980, pp. 120-122.
Gersbach, "High-Speed Shifter Array" IBM Tech. Disclosure Bulletin, vol. 21, No. 4, Sep. 1978, pp. 1379-1380.

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