Multi-stage delay clock generator

Details Multi-stage delay clock generator Multi-stage delay clock generator

2006-04-25

2006-04-25

Nguyen, Linh My (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S149000

Reexamination Certificate

active

07034589

ABSTRACT:
The present invention provides a multi-stage delay clock generator including: a plurality of delay cells, each delay cell generating a delay signal to a subsequent delay cell in response to a delayed clock signal from a preceding delay cell and a delay control signal where a first delay cell among the plurality of delay cells receives an external clock signal, and each subsequent delay cell comprises a smaller delay step than the current delay cell; a phase detector, responsive to the external clock signal and a feedback clock signal, for generating a lock control signal; an integrator, responsive to the lock control signal, for generating the delay control signal; and a control unit for programming the delay cells.

REFERENCES:
patent: 6437616 (2002-08-01), Antone et al.
patent: 6549052 (2003-04-01), Okayasu
patent: 6693473 (2004-02-01), Alexander et al.
patent: 2003/0011414 (2003-01-01), Bell

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