Multi-slice network processor

Details Multi-slice network processor Multi-slice network processor

2003-07-03

2009-02-03

Rao, Seema S (Department: 2616)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S395100, C370S396000, C370S429000

Reexamination Certificate

active

07486678

ABSTRACT:
A multi-slice network processor processes a packet in packet slices for transfer over a multi-port network interface such as a switch fabric. The network processor segments a packet into cells having a target size. A group of cells of a common packet form a packet slice which is independently processed by one of a number of parallel processing and storage slices. Load balancing may be used in the selection of processing slices. Furthermore, the network processor may load balance slices across the multi-port network interface to one or more destination slices of another network processor. The multi-slice processor uses post header storage delivery on ingress processing to the multi-port interface thereby reducing temporary storage requirements. The multi-slice network processor may also utilize sequence numbers associated with each packet to ensure that prior to transmission onto a destination network, the packet is in the correct order for a communication flow.

REFERENCES:
patent: 6724767 (2004-04-01), Chong et al.
patent: 6907001 (2005-06-01), Nakayama et al.
patent: 6977930 (2005-12-01), Epps et al.
patent: 7010004 (2006-03-01), Gazit
patent: 7016352 (2006-03-01), Chow et al.
patent: 7016367 (2006-03-01), Dyckerhoff et al.
IETF RFC 3031, “MPLS Architecture”, Jan. 2001.

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