Television – Basic receiver with additional function – For display of additional information
Reexamination Certificate
1998-07-09
2002-05-07
Faile, Andrew (Department: 2614)
Television
Basic receiver with additional function
For display of additional information
C348S565000, C348S566000, C348S567000, C348S568000, C348S705000
Reexamination Certificate
active
06384868
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a multi-screen display apparatus and a video switching processing apparatus, and more specifically to a multi-screen display apparatus and a video switching processing apparatus which improves display quality by realizing a screen display without flickering when a sub-screen is displayed and by smoothly switching screens when an image displayed on the screen is switched to another image when, for example, a channel is switched in a video device such as a television receiver which includes a video memory and processes a digital signal by controlling write and read to the memory.
2. Description of the Related Art
Television receivers having a function of displaying two, three, or more screens in addition to a normal (main) screen have been conventionally marketed. Furthermore, television receivers having wide aspect (wide screen) color picture tubes (hereinafter referred to as CPT) such as an HDTV (high definition television) and an EDTV have become popular. Based on the above described background, multi-screen display models (for displaying a plurality of sub-screens on a display device) specific to wide aspect CPT television receivers (referred to as wide television receivers) have been developed.
A sub-screen processing method in the conventional multi-screen display apparatus is described below by referring to
FIGS. 15 and 16
.
FIG. 15
shows an example of displaying multiple screens.
FIG. 16
is a block diagram showing a configuration of the conventional multi-screen display apparatus. As shown in
FIG. 15
, the method of displaying a main screen using a video signal (main image) and sub-screens A and B adjacent to the main screen using two video signals (sub-images A and B) different from the signal for the main screen is described below as an example of the conventional technology. In this case, a compressing process is horizontally performed on the video signal of the main screen to normally display a moving picture. The video signals of the sub-screens A and B are alternately written to and read from two areas A and B of the video memory (hereinafter referred to simply as memory) at predetermined intervals (that is, one field for several fields in the fields forming video signals of the sub-screens A and B), and displayed as a multi-screen semi-moving picture. When the sub-images A and B are written to the memory, the vertical amplification of each image is ½. Therefore, the number of horizontal lines of the field images A and B written to the memory is reduced to ½.
In
FIG. 16
, a horizontal synchronous signal (hereinafter referred to as a sub-HD (A)), a vertical synchronous signal (hereinafter referred to as a sub-VD (A)), and a video signal (hereinafter referred to as a sub-image (A)) of the sub-screen A are respectively input to input terminals
100
,
101
, and
102
in a system A of a selector
119
. A horizontal synchronous signal (hereinafter referred to as a sub-HD (B)), a vertical synchronous signal (hereinafter referred to as a sub-VD (B)), and a video signal (hereinafter referred to as a sub-image (B)) of the sub-screen B are respectively input to input terminals
106
,
107
, and
108
in a system B.
A selector
119
is controlled by an A/B selection signal of a microcomputer
130
, and an input signal of the above described A or B system is selected, and a horizontal synchronous signal HD, a vertical synchronous signal VD, and a video signal of the sub-screen converted into digital data by an A/D converter
103
are provided to a synchronous video processing circuit
104
.
In the synchronous video processing circuit
104
, a clock is obtained by providing a control signal to a PPL circuit
105
, and a system clock can be generated by dividing the obtained clock as necessary. According to the system clock, a horizontal reference pulse HD′ and a vertical reference pulse VD′ can be generated from each of the input signals in the synchronous video processing circuit
104
. Simultaneously, it is determined whether the video field is an odd field (ODD) or an even field (EVEN), and a field flag (for example, a high-level signal for an ODD) is generated. Then, an operating process such as video compression is performed on a sub-image, and a compressed video signal of the system A or B and each control signal (a system clock, a horizontal reference pulse, a vertical reference pulse, a field flag) are provided to a memory write control circuit
113
.
The memory write control circuit
113
determines a field to be written to according to the VD′ signal and the field flag. Furthermore, a write control signal (hereinafter referred to as a WE) is generated as a write enabling signal during the period of the determined field, and is provided to a memory
114
. Two sets of video signals of the sub-screen A or B divided into a luminance signal and a chrominance signal according to the WE are written into the memory
114
.
A horizontal synchronous signal (hereinafter referred to as a main HD), a vertical synchronous signal (hereinafter referred to as a main-VD), and a video signal (hereinafter referred to as a main image) of the main-screen are respectively input to terminals
120
,
121
, and
122
. The HD and VD of the main screen are provided to a memory read control circuit
115
and a main video processing circuit
124
, and the main video signal is converted into digital data by an A/D converter
123
and provided to the main video processing circuit
124
.
The main video processing circuit
124
performs a process such as a compressing process on the main video signal. The main video signal is converted into an analog signal by a D/A converter
125
, and provided to a selector
117
.
On the other hand, using the above described two sets of video signals of the sub-screen written to the memory
114
, the sub-screens A and B are read according to the control signal output from the memory read control circuit
115
to the memory
114
based on the HD and VD for the main screen provided to the memory read control circuit
115
and input from the input terminals
120
and
121
.
After the memory read control circuit
115
performs an output process such as a phase adjustment of a luminance signal and a chrominance signal on the video signals of the read sub-screens, a D/A converter
116
converts the video signals into analog data and provided to the selector
117
.
Using the main/sub-selection signal output from the memory read control circuit
115
for realizing a multi-screen display, the selector
117
selects the main video signal and the synthesizing signals of the sub-screens A and B alternately, and outputs the synthesized main/sub-video signal to a terminal
126
. The main video signal is normally a moving picture signal, and the signals of the sub-screens A and B are semi-moving signals to be rewritten according to the switch period of the A/B selection signal of the selector
119
.
As described above, the A/B selection signal for realizing the semi-moving picture of the sub-screens A and B are provided to the selector
119
from the microcomputer
130
. The microcomputer
130
switches the A/B selection signal regardless of the write state to the memory after a predetermined time. The shorter the period of the A/B selection signal is, the closer to moving pictures the sub-screens A and B become. However, it requires about 8 fields or more because of the time taken to stabilize the video switching in other circuits, and the time required to control the write to the memory, thereby obtaining a stroboscopic image.
As described above, in the conventional multi-screen semi-moving picture display, the sub-images (A) and (B) provided as input data are switched from each other by the microcomputer providing the A/B selection signal having a predetermined period to the selector
119
regardless of the state of the write to the memory. To display a sub-screen as a moving picture closer to the main screen, it is necessary to reduce the write field in
Faile Andrew
Kabushiki Kaisha Toshiba
Natnael Paulos
Pillsbury & Winthrop LLP
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