Multi-row lead frame

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame

Reexamination Certificate

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Details

C438S015000, C438S064000, C438S011000, C438S123000

Reexamination Certificate

active

11364047

ABSTRACT:
A lead frame (10) for a semiconductor device includes a first row of terminals (12) surrounding a die receiving area (14) and a second row of terminals (16) spaced from and surrounding the first row of terminals (12). The first and second rows of terminals (12, 16) have a first height (H1). The terminals (12) of the first row include a step (26) that has a greater height (H2). Bond wires (36) connecting die pads (34) to the first row terminals (12) extend over the second height H2part of the terminal (12) and are attached to the first height H1part of the terminal (12). The step (26) insures that the bond wires (36) attached to the stepped terminals (12) have a high wire kink profile so that they are less susceptible to damage in later process steps.

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patent: 2006/0170081 (2006-08-01), Gerber et al.

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