Multi rate clock data recovery based on multi sampling...

Details Multi rate clock data recovery based on multi sampling... Multi rate clock data recovery based on multi sampling...

2004-04-21

2008-03-25

Ha, Dac V. (Department: 2611)

Pulse or digital communications

Synchronizers

Synchronizing the sampling time of digital data

C375S360000, C375S371000

Reexamination Certificate

active

07349509

ABSTRACT:
A clock and data recovery device (CDR) based on multi-rate multi-phase oversampling technique is capable of receiving serial data streams of different data rates. The CDR uses a multi-rate multi-phase oversampling technique. N phase shifted clocks are generated based on a single clock and rising edges (or falling) of the phase shifted clocks and define N sampling points where a serial data stream is sampled. The multi-phase oversampling technique provides at least two sampling points per data bit of the serial data stream at highest data rates. The sampling points divide one clock cycle of the single clock into N zones. Depending on which of the zones a data edge transition is detected, the CDR can converge the sampling points to optimal data sampling positions in the serial data stream.

REFERENCES:
patent: 5757297 (1998-05-01), Ferraiolo et al.
patent: 2004/0247049 (2004-12-01), Maddux
patent: 2005/0069071 (2005-03-01), Kim et al.
patent: 2005/0180536 (2005-08-01), Payne et al.

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