Multi-protocol packet translator

Multiplex communications – Communication techniques for information carried in plural... – Adaptive

Reexamination Certificate

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Details

C370S464000, C370S349000

Reexamination Certificate

active

06198751

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to communication networks, and more particularly, to apparatus and methods for translating information packets from one network protocol to another network protocol.
DISCUSSION OF THE RELATED ART
Computer communication networks have proliferated in order to enable the sharing of computer resources over a computer network. A network for permitting communication may be referred to as a local area network or “LAN.” LAN refers to an interconnection data network that is usually confined to a moderately sized geographical area, such as a single office building or a campus area. Larger networks are often referred to as wide area networks or “WANs.”
Networks may be formed using a variety of different interconnection elements, such as unshielded twisted pair cables, shielded twisted pair cables, coaxial cable, fiber optic cable, or even wireless interconnect elements. The configuration of these cabling elements can follow one (or more) of many topologies, such as star, ring or bus.
In addition, a number of different protocols for accessing the networking medium have evolved. Examples of various network protocols include FDDI, Ethernet (and multiple Ethernet communication protocols), ATM, token ring (and multiple token ring communication protocols) and ISDN. One particularly attractive communication network is described in U.S. Pat. No. 5,485,455, issued Jan. 16, 1996.
The total number of installed communication networks has grown explosively. The number of communication protocols also continues to expand. Consequently, there are a great number of installed networks, many using different protocols. As the number of networks and network protocols has expanded, so has the desire to expand the scope of network coverage. The result is a desire to send packets from networks using one communication protocol to networks using other communication protocols.
A communication within a network is referred to as a “packet” (“packet” and “data packet” are intended to include traditional data packets and any functional equivalent, whether referred to in the art as “cells,” “datagrams,” or the like). A packet intended for use with one protocol cannot necessarily be used in a network that follows a different protocol. Accordingly, some form of translation is required when sending packets between networks that follow different communication protocols.
FIG. 1
illustrates an example of a prior art connection between networks. The first network
10
forwards communications within the network
10
according to one communication protocol. The second network
11
forwards communication packets around the network
11
using a different communication protocol. Accordingly, if a packet needs to be sent from the first network
10
to the second network
11
, a translation needs to be made. According to the prior art, a translation unit
12
is included for translating packets from the communication protocol of the first network
10
to the communication protocol of the second network
11
, and vice versa.
For design of the translator
12
, the prior art follows one of two approaches. In the first approach, a general purpose computer processor is used to do the translations. The processor generally stores the packet in memory, manipulates the packet within that memory to conform to the new protocol and then outputs the translated packet.
The second approach is to design a custom hardware machine to perform the translation. For this solution, a state machine is hard coded to perform each translation from one format to the other. In the event that the translator
12
must translate from multiple formats to multiple formats, a fast hard coded translator must be designed and implemented for each translation. While common parts of similar translations may be combined to decrease circuitry, this adds significantly to the complexity of hardware verification. The hard coded state machine is usually implemented on an application specific integrated circuit (ASIC) or using a programmable logic device (PLD, such as field programmable gate arrays or complex programmable logic devices).
SUMMARY OF THE INVENTION
According to one embodiment of the present invention a translator unit is disclosed for translating a packet from one communication protocol to a second communication protocol. In this embodiment, the translator unit comprises an input memory, an information source, an output memory, and a connection circuit that selectively connects the input memory and the information source to the output memory, to selectively write information into the output memory according to the second communication protocol's format. The translator unit also includes a microcoded control unit coupled to the connection circuit. In this embodiment, the microcoded control unit may include a pipeline unit coupled to the connection circuit.
According to another embodiment of the present invention, a pipeline control unit for reading data is disclosed. The control unit includes a first memory having a first read latency, a second memory having a second read latency, longer than the first read latency, a pipeline unit having a first stage and a second stage, and a circuit that initiates read cycles from the first memory based on a first instruction in the second stage of the pipeline and which initiates read cycles from the second memory based on a second instruction in the first stage of the pipeline.
According to another embodiment of the present invention, a method of translating a packet is disclosed. According to this embodiment, a first memory is loaded with a set of microcode instructions, each set being designed to perform a different network communication protocol translation. The method also includes the steps of receiving an original packet to be translated, selecting one of the sets of the microcode instructions based on the first protocol and the second protocol, and translating the original packet by executing the selected set of microcode instructions.
According to another embodiment of the present invention, a method of translating an original packet into a translated packet is disclosed. According to this method, an instruction memory is loaded with a set of instructions. The original packet is placed into an input memory. An information source is provided and an output memory to store the translated packets is provided. The input memory and the information source are sequentially and selectively connected to the output memory, based on the instructions.


REFERENCES:
patent: 5117429 (1992-05-01), Lagoutte
patent: 5651002 (1997-07-01), Van Seters
patent: 5655140 (1997-08-01), Haddock
patent: 5717910 (1998-02-01), Henry
patent: 5787255 (1998-07-01), Parlan
patent: 5812792 (1998-09-01), Haddock
patent: 5832236 (1998-11-01), Lee
patent: 0 289 248 (1988-11-01), None
A.S. Krishnakumar, et al., The Programmable Protocol VLSI Engine (Prove), Jun. 14, 1992, Supercomm, ICC '92.
A.S. Krishnakumar, et al., VLSI Implementations of Communication Protocols—A Survey, Sep. 1989, IEEE Journal on Selected Areas in Communications.
Matthias Kaiserswerth, The Parallel Protocol Engine, Dec. 1993, IEEE/ACM Transactions on Networking.
Patent Specification, P.2, L. 14-25.

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