Multi-processor system with shared memory

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3642281, 364229, 3642318, 3642319, 3642327, 364DIG1, G06F 1300, G06F 1516

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active

057014132

ABSTRACT:
A multi-processor system in wherein a plurality of processors have access to a plurality of shared memory modules, comprising a memory control unit, interconnection logic circuits, a system bus for the multipoint connection of the processors to the memory control unit and for the transfer of memory addresses and commands for ordered and successive read/write operations via the system bus and the memory control unit, whilst the transfer of data to and from the memory modules takes place through data channels which connect the various processors on a point-to-point basis to the interconnection logic circuits and via these to a memory data transfer channel.

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Bagnoli, C, Gori, M & Soda, G, Design and Implementation of the GMMP Multi-Processor System, MIMI '84, Proc. ISMM Int. Symp., Mini-and Microcomputers & their Application, Bari (Italy), 5, Jun., 1984, pp. 95-98 .

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