Boots – shoes – and leggings
Patent
1994-01-10
1997-12-23
Teska, Kevin J.
Boots, shoes, and leggings
3642281, 364229, 3642318, 3642319, 3642327, 364DIG1, G06F 1300, G06F 1516
Patent
active
057014132
ABSTRACT:
A multi-processor system in wherein a plurality of processors have access to a plurality of shared memory modules, comprising a memory control unit, interconnection logic circuits, a system bus for the multipoint connection of the processors to the memory control unit and for the transfer of memory addresses and commands for ordered and successive read/write operations via the system bus and the memory control unit, whilst the transfer of data to and from the memory modules takes place through data channels which connect the various processors on a point-to-point basis to the interconnection logic circuits and via these to a memory data transfer channel.
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Bagnoli Carlo
Lazzari Angelo
Ramolini Angelo
Zulian Ferruccio
Bull HN Information Systems Italia S.p.A.
Manzo Edward D.
Mohamed Ayni
Murphy Mark J.
Ringsred Ted K.
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