Multi-processor system for detecting a malfunction of a dual por

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Details

3642411, 364242, 3642653, 364DIG1, 364941, 364DIG2, 371 161, G06F 1100

Patent

active

052108635

ABSTRACT:
A multi-processor system wherein two processors are connected through a dual port memory which receives from one of the processors an interruption request signal together with the data to be transmitted to the other processor. The dual port memory then generates an interrupt signal for the other processor so that the other processor can fetch the data from the dual port memory using an interrupt procedure. The one processor also receives the interrupt signal transmitted by the dual port memory in order to confirm the status of the interrupt signal generating function of the dual port memory.

REFERENCES:
patent: 4953074 (1990-08-01), Kametani et al.

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