Multi-processor DVR

Details Multi-processor DVR Multi-processor DVR

2005-07-26

2005-07-26

Boccio, Vincent (Department: 2616)

Interactive video distribution systems

Video distribution system with local interaction

Receiver

C725S142000, C386S349000, C386S349000

Reexamination Certificate

active

06922845

ABSTRACT:
A set top box (STB) includes multiple processors that handle either real time or non-real time functions within the STB. One of the processors may perform substantially all of the real time operations, such as control of a data pipeline to the STB, conditional access, and control of a program guide stored within the DVR. The other processor may control substantially all non-real time functions that are executed within the STB, such as graphics user interface and browser functions. The STB may be embodied as a digital video recorder (DVR). The additional processor(s) provide for increased overall system bandwidth, improved system security and greater system stability for an STB and/or DVR configured with these multiple processors, as compared to a conventional STB having a single micro-controller or processor.

REFERENCES:
patent: 5828416 (1998-10-01), Ryan
patent: 6233389 (2001-05-01), Barton et al.
patent: 6298370 (2001-10-01), Tang et al.
patent: 0 840 512 (1997-03-01), None
J.L. Droitcourt, LSI Logic, France, “Integra Architecture- Anatomy Of The Interactive Television Set-Top Box, How It Works, And What It Means To The Consumer” International Broadcasting Convention, Sep. 12-16, 1996.

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