Multi-processor data processing system with multiple, separate i

Details Multi-processor data processing system with multiple, separate i Multi-processor data processing system with multiple, separate i

1995-12-28

1997-10-21

Asta, Frank J.

Boots, shoes, and leggings

395444, 395446, 395448, 395450, 395457, 395468, 395469, 364DIG1, G06F 1300, G06F 1208

Patent

active

056805713

ABSTRACT:
A multiprocessor data processing system having store-through first-level caches with separate instruction and operand sections and a store-in second-level cache that is shared between the processors and which has separate instruction and operand sections. Dual second-level caches, each mappable to all of shared memory, enhance cache performance. The second-level cache memory space is divided into a plurality of segments, with each segment having a dedicated instruction tag memory, a dedicated operand tag memory, a dedicated instruction cache memory, and a dedicated operand cache memory. The segments may be addressed in parallel to further enhance cache performance.

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