Multi-processor data communication bus structure

Details Multi-processor data communication bus structure Multi-processor data communication bus structure

1981-02-25

1983-11-22

Heckler, Thomas M.

Boots, shoes, and leggings

G06F 1516

Patent

active

044173032

ABSTRACT:
A bus structure for the interconnection between a data bus capable of transferring a plurality of words and a local bus which can carry only one word. This structure includes latches for storing the plurality of words for simultaneous transfer over the data bus or for sequential transfer over the local bus as required. Control logic operates to perform the necessary control over this interconnection to effect the required operation.

REFERENCES:
patent: 4035777 (1977-07-01), Moreton
patent: 4070710 (1978-01-01), Sukonick et al.
patent: 4124890 (1978-11-01), Vasenkov et al.
patent: 4320457 (1982-03-01), Tanikawa

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