Multi-power supply integrated circuit and system employing the s

Details Multi-power supply integrated circuit and system employing the s Multi-power supply integrated circuit and system employing the s

1997-06-25

1999-07-06

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

257371, 257372, 257204, 257206, 257207, 257369, 327110, 327112, 327210, 327213, 327272, 327391, H01L 2976

Patent

active

059200898

ABSTRACT:
There is disclosed a multi-power supply integrated circuit including a first pMOS transistor which is formed in a first n-well and operated at a first supply voltage and a second pMOS transistor which is formed in a second n-well and operated at a second supply voltage being lower than the first supply voltage, wherein the first n-well and the second n-well are placed adjacently to put a boundary line therebetween and also the first supply voltage is supplied to both the first and second n-wells. Because a space between the first and second n-wells is made small, a gate array LSI with a reduced chip area is provided. A common n-well may be formed in place of the first and second n-wells.

REFERENCES:
patent: 5239197 (1993-08-01), Yamamoto
patent: 5332916 (1994-07-01), Hirai
patent: 5399917 (1995-03-01), Allen et al.
patent: 5446303 (1995-08-01), Quill et al.
patent: 5473183 (1995-12-01), Yonemoto
patent: 5506437 (1996-04-01), May et al.
patent: 5581103 (1996-12-01), Mizukami

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