Multi-port system

Details Multi-port system Multi-port system

1983-05-31

1986-10-07

Moffitt, James W.

Static information storage and retrieval

Addressing

G11C 800

Patent

active

046163476

ABSTRACT:
The present invention is especially directed towards an improved support circuitry for a memory array which utilizes support circuitry in a memory array such that, when an address compare occurs, selected ones of the array word decoders are disabled to prevent a multiple read, and selected higher order read heads are altered, i.e., inhibited from reading the output data of the higher order bit lines and forced to read or copy the lowest order bit lines having the same address as the uninhibited word decoder.

REFERENCES:
patent: 3801965 (1974-04-01), Keller et al.
patent: 3896417 (1975-07-01), Beecham
patent: 4078261 (1978-03-01), Millhollan et al.
patent: 4090258 (1978-05-01), Cricchi
patent: 4183095 (1980-01-01), Ward
patent: 4314164 (1982-02-01), Tin et al.
patent: 4535428 (1985-08-01), Furman
patent: 4558433 (1985-12-01), Bernstein

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