Multi-phase clock generator circuit

Details Multi-phase clock generator circuit Multi-phase clock generator circuit

1997-08-22

1999-02-02

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Phase shift by less than period of input

327256, 327259, 327293, 327295, 326 93, H03K 301, H03K 500

Patent

active

058670467

ABSTRACT:
A multi-phase clock generator for receiving an external clock signal through a PLL and for generating a plurality of internal clock signals differing in phase from each other. The multi-phase clock generator includes two large gates whose outputs are the two internal clock signals, and two latch circuits for controlling the logic gate outputs. The output from the PLL is fed forward to the logic gates so that the rise of one internal clock signal is separated from a prior fall of the other internal clock signal by a period related to the frequency of the PLL output.

REFERENCES:
patent: 4283639 (1981-08-01), Roesler
patent: 4761568 (1988-08-01), Stronski
patent: 4827157 (1989-05-01), Machida et al.
patent: 5047659 (1991-09-01), Ullrich
patent: 5341031 (1994-08-01), Kinoshita et al.

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