Multi-phase clock generator

Details Multi-phase clock generator Multi-phase clock generator

2007-01-22

2008-11-25

Luu, An T (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S295000, C327S155000, C327S161000

Reexamination Certificate

active

07456673

ABSTRACT:
Provided is a multi-phase clock generator which is not influenced by a mismatch and of which a maximum frequency is not limited. The multi-phase clock generator includes a first delay line, a second delay line, a phase detector, and an up/down counter. The first delay line generates a first clock signal by delaying an input clock for a first delay time. The second delay line generates a second clock signal by delaying the input clock for a second delay time in response to a control signal. The phase detector detects a phase difference between the first and second clock signals. The up/down counter generates the control signal in response to an output of the phase detector.

REFERENCES:
patent: 6683928 (2004-01-01), Bhullar et al.
patent: 6812760 (2004-11-01), Kim et al.
patent: 2004/0155686 (2004-08-01), Kim et al.

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