Multi-phase and gate

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307200B, 307207, 307208, 307215, 307218, 307DIG1, H03K 1922, H03K 1908

Patent

active

041004302

ABSTRACT:
A no-delay, ratioless AND gate compatible with a four-phase, major-minor clocking scheme and a six-phase metal oxide semiconductor (MOS) system. The disclosed AND gate can be implemented by the interconnection of first and second field effect transistors having conduction paths thereof selectively connected between a respective input terminal and the output terminal of the AND gate to precharge and conditionally discharge the output terminal.

REFERENCES:
patent: 3617767 (1971-11-01), Booher
patent: 3935474 (1976-01-01), Komarek
patent: 3942162 (1976-03-01), Buchanan
patent: 4042833 (1977-08-01), Lesser

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