Multi-pass programming in a memory device

Details Multi-pass programming in a memory device Multi-pass programming in a memory device

2008-11-21

2011-11-22

Le, Vu (Department: 2824)

Static information storage and retrieval

Floating gate

Multiple values

C365S185190, C365S185180

Reexamination Certificate

active

08064252

ABSTRACT:
A method for programming a memory device, a memory device, and a memory system are provided. According to at least one such method, a first programming pass generates a plurality of first programming pulses to increase the threshold voltages of target memory cells to either a pre-program level or to the highest programmed threshold. A second programming pass applies a plurality of second programming pulses to the target memory cells to increase their threshold voltages only if they were programmed to the pre-program level. The target memory cells programmed to their respective target threshold levels during the first pass are not programmed further.

REFERENCES:
patent: 6643188 (2003-11-01), Tanaka et al.
patent: 6888758 (2005-05-01), Hemink et al.
patent: 7324383 (2008-01-01), Incarnati et al.
patent: 7839687 (2010-11-01), Dutta et al.
patent: 2004/0066685 (2004-04-01), Choi
patent: 2007/0121386 (2007-05-01), Ho et al.
patent: 2011/0013460 (2011-01-01), Dong et al.
Roohparvar, Frankie F. et al., “Coarse and Fine Programming in a Solid State Memory”, (38 pgs. including drawings) U.S. Appl. No. 11/818,683, filed Jun. 15, 2007.

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