Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1999-04-13
2001-06-26
Saras, Steven (Department: 2675)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S094000, C345S099000, C345S100000
Reexamination Certificate
active
06252567
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to a multiple-output digital to analog converter as defined in the precharacterizing part of claim
1
. The invention further relates to a method of converting digital data into a plurality of analog output voltages as defined in the precharacterizing part of claim
8
. The invention also relates to a matrix display with such a converter as defined in the precharacterizing part of claim
9
.
Such a multiple-output digital to analog converter is known from prior art U.S. Pat. No. 4,766,430 which discloses a drive circuit for a liquid crystal display with a matrix of picture elements. Row select lines select the picture elements row by row and a drive circuit drives the picture elements in a selected row in parallel by supplying drive voltages via column data lines. The drive circuit receives an input information signal representative of the data to be displayed to supply digital brightness counts, individually indicative of brightness levels for each picture element, to counters, whereby there is one counter for each column of the display. Each counter is first loaded with the brightness count and subsequently starts counting down. The counter turns off a transfer gate the instant its count becomes zero. As long as the transfer gate is on, the associated picture element receives a ramping voltage generated by an analog waveform generator. The instant the count reaches zero, the transfer gate disconnects the picture element from the waveform generator and the voltage across the picture element is frozen. In this way, the brightness of the picture element is controlled by the brightness count loaded into the counter, and is determined by the value of the ramping voltage the instant the count reaches zero.
It is a drawback of the drive circuit or the multiple-output digital to analog converter which converts digital brightness counts into analog voltages across the picture elements that the ramping voltage is disturbed the instant a transfer gate disconnects a picture element. This disturbance is especially large if many picture elements have to display a same brightness. The disturbance of the ramping voltage causes a visible brightness error for picture elements which are disconnected only a short time later.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a multi-output digital to analog converter with reduced disturbance of the ramping waveform.
To this end, a first aspect of the invention provides a multiple-output digital to analog converter as defined in claim
1
. A second aspect of the invention provides a method of converting digital data into a plurality of analog output voltages as defined in claim
8
. A third aspect of the invention provides a matrix display with a multiple-output digital to analog converter as defined in claim
9
. Advantageous embodiments of the invention are defined in the dependent claims.
In a multiple-output digital to analog converter in accordance with the invention, digital input data is converted into a plurality of analog output voltages across associated loads. A buffer has an output to supply a waveform to the loads via a coupling circuit. The waveform may be generated by a ramp generator. A timing generator generates time periods in dependence on the digital data. The coupling circuit couples a specific load to the buffer output during an associated time period. The output voltage across the specific load is related to a value of the waveform at the end of the associated time period when the coupling circuit decouples the load from the buffer output. The coupling circuit may comprise a plurality of switching elements, each switching element is coupled between the output of the buffer and one of the loads. In this case, the timing generator converts the digital input data into a plurality of control signals determining the time periods during which corresponding switching elements are closed. The output voltages across one of the loads vary according to the waveform until an associated switching element opens.
The multiple-output digital to analog converter according to the invention further comprises at least one dummy load. When a plurality of dummy loads is applied, each one of the dummy loads is associated with a corresponding one of the loads. The dummy load is coupled to the buffer output when the corresponding load is decoupled from the buffer output. A pre-setting circuit generates the voltage across the dummy load so as to be substantially equal to the output voltage across the associated load occurring the instant the coupling circuit decouples the load from the output buffer. In this way, the load on the buffer output is substantially constant, and the waveform will not be disturbed by load changes if a load is decoupled from the buffer output. It is not necessary to add a dummy load for every load. The disturbance of the waveform at the buffer output decreases already if only a part of the number of loads which are decoupled at a same instant is associated with a corresponding dummy load which at the same instant is coupled to the buffer output.
In an embodiment of the invention, the number of dummy loads is equal to the number of loads, so that the load on the buffer output is substantially constant.
REFERENCES:
patent: 4766430 (1988-08-01), Gillette
patent: 5400028 (1995-03-01), Schlig
patent: 5600345 (1997-02-01), Dingwall et al.
patent: 5670979 (1997-09-01), Huq et al.
patent: 5684487 (1997-11-01), Timko
patent: 5889485 (1999-03-01), Schneider
Franzblau Bernard
Saras Steven
U.S. Philips Corporation
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