Multi-modulus frequency divider

Details Multi-modulus frequency divider Multi-modulus frequency divider

1998-07-17

2000-08-01

Wambach, Margaret R.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Pulse multiplication or division

377 39, 377 44, H03K 2100

Patent

active

060977825

ABSTRACT:
A multi-ratio frequency divider, which is implemented in a BiCMOS (bipolar-complementary metal oxide semiconductor) circuit, includes a dual-modulus counter for dividing by P+1 and P. P+1 is a power of two and there is not necessary an additional flip-flop responsive to high input frequency, which consumes power due to bipolar transistor devices. An output from the counter is further divided by a variably set value. When its count reaches another set value, the division ratio of the dual-modulus counter is switched to another division ratio. When the further divided counter reaches the variably set value, a new cycle starts. The total division ratio of the multi-modulus frequency divider is a combination of the variably set division values, both being binary bit data. No decoder is necessary for converting an input division ratio to the set values.

REFERENCES:
patent: 4472820 (1984-09-01), Borras
patent: 5337339 (1994-08-01), Hillstrom

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