Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Converting input voltage to output current or vice versa
Reexamination Certificate
2000-07-17
2002-07-09
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Converting input voltage to output current or vice versa
C327S541000, C327S543000, C327S334000
Reexamination Certificate
active
06417702
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method and apparatus for current-to-voltage conversion which is able to provide sensitive current-to-voltage detection for a small amplitude AC current signal, even if the AC current signal has a DC component which varies greatly over a very wide range.
BACKGROUND OF THE INVENTION
Existing approaches to current-to-voltage conversion in VLSI are usually based on:
(1) Charge integration. A current charging or discharging a capacitor during a given period transduces itself linearly into a voltage. This process introduces a delay that is the time required for the charge integration and is inversely proportional to the current. The dynamic range of the input current is usually below three decades. Moreover, the capacitor is a critical device as its capacitance should be voltage-independent.
(2) Characteristic of drain-to-source voltage versus drain current of a MOS transistor biased in the triode region. The equivalent resistance in this region is almost constant when the drain-to-source voltage is small, so it can be used for a linear current-to-voltage conversion. The conversion gain (output voltage over input current) is low, about a couple of milli-volts per micro-ampere. Thus, an input current varying in a nano-ampere range cannot be correctly converted. Furthermore, as the output voltage signal is small, an amplifier is usually required.
(3) Characteristic of gate-to-source voltage versus drain current of a MOS transistor biased in the saturation region. This feature makes a logarithmic conversion. The conversion gain of a logarithmic converter is of the order of one hundred millivolts per decade of current. Moreover, the logarithmic compression reduces the chance to detect current derivatives.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a method and circuit for the realization of a highly sensitive current detector operational in a very wide dynamic range and capable of performing linear and high-gain current-to-voltage conversions. The detection can be done in a linear and a non-linear mode of operation of the circuit, combining the advantages of high-gain in a linear conversion and large dynamic range in a logarithmic conversion in one circuit.
Another object of the invention is to provide a circuit with a simple structure composed of a minimum number of transistors on-chip for efficient current to voltage conversion. The circuit does not require any off-chip capacitors or resistors, and is capable of operating in a linear mode on a single clock.
Yet another object of the current invention is to introduce minimal delay into a current-to-voltage conversion, while allowing an input current varying in a nano-ampere, or even sub-nano, range to be correctly converted.
In accordance with a first aspect of the present invention, there is provided a method for adapting a three-terminal semiconductor device having an operating point and used for current-to-voltage conversion, to a variation of input current level in order to maintain the operation of the device in the linear portion of a curve belonging to a family of i-v curves selected in response to a bias voltage and comprising a linear and a non-linear portion. The three-terminal semiconductor device has an input current terminal, a bias terminal, and a common terminal. A bias voltage between the bias terminal and common terminal controls the current flow between the input current terminal and the common terminal.
The method comprises steps of setting the bias voltage to a preset value in order to position the operating point of the device to an initial value, detecting a change in level of the direct current component of an input current, and adjusting the bias voltage value in response to the change in current level in order to adapt the operating point of the device to an alternate i-v curve so as to remain in the linear portion of a curve.
The current I
IN
of the device can be set so as to maximize the range of output voltage V
OUT
by situating the operating point at approximately the middle of the saturation region. Setting the bias voltage to a preset value to position the operating point can be done using a structure of two cascoded transistors, one of which is drain-gate shorted, to sample an input current.
The step of detecting a change in level of an input current can be done upon closing of a switch and the bias voltage of the semiconductor device is adjusted with respect to a newly sampled input current.
In accordance with a second aspect of the present invention, there is provided a circuit to perform current-to-voltage conversion comprising a three-terminal semiconductor device, having an input current terminal, a bias terminal, and a common terminal. A bias voltage between the bias terminal and common terminal controls the current flow between the input current terminal and the common terminal, whereby the output voltage to be measured is present at the input current terminal. The device has an operating point situated on a curve belonging to a family of i-v curves, the curves comprising a linear and a non-linear portion. The circuit also comprises circuitry to detect a level of an input current, and circuitry to adjust the bias voltage value in response to the input current level detected.
More specifically, this can be done by connecting a structure of two cascoded transistors, one of which is drain-gate shorted, to the bias voltage terminal of the three-terminal semiconductor device, and to a clocked transistor, which is connected to the input current terminal of the semiconductor device.
As an alternative, logarithmic mode can also be achieved by simply replacing the clocked transistor by a wire, an off-chip resistance, or a logic gate using a voltage-controlled switch. It is preferable for the entire circuit to reside on an integrated circuit chip but this does not exclude the possibility of having off-chip components.
REFERENCES:
patent: 3835410 (1974-09-01), Wittlinger
patent: 3925718 (1975-12-01), Wittlinger
patent: 4354122 (1982-10-01), Embree et al.
patent: 4882533 (1989-11-01), Kelley
patent: 5057792 (1991-10-01), Gay
patent: 5252909 (1993-10-01), Aizaki
patent: 5293058 (1994-03-01), Tsividis
patent: 5818213 (1998-10-01), Kim
patent: 5838188 (1998-11-01), Taguchi
patent: 6107868 (2000-08-01), Diniz et al.
patent: 6194956 (2001-02-01), Barnes
Measurement and Modeling of Charge Feedthrough in n-Channel MOS Analog Switches, Wilson et al, IEEE Journal of Solid-State Circuits, vol. sc-20, No. 6, pp. 1206-1212, Dec. 1985.
Current Copier Cells, Daubert et al., Electronics Letters, vol. 24, No. 25, pp. 1560-1562, Dec. 8, 1988.
Very Linear CMOS Floating Resistor, Silva-Martinez et al., Electonics Letters, vol. 26, No. 19, pp. 1610-1611, Sep. 13, 1990.
Linear Tunable Resistance Circuit Using Gallium Arsenide MESFETs, Silva-Martinez et al., Electronics Letters, vol. 27, No. 8, pp. 655-657, Apr. 11, 1991.
Novel MOS Resistive Circuit for Synthesis of Fully Integrated Continuous-Time Filters, Z. Czarnul, IEEE Transactions on Circuits and Systems, vol. CAS-33, No. 7, pp. 718-721, Jul. 1986.
Low Power Current Comparator Cell for Weak Current Operations, C. Wang et al., IEEE ISCAS 2001, Sydney, Australia, pp. I-544-I-547.
An Adaptive Optical Sensor, C. Wang et al., ISCAS 2000 -IEEE International Symposium on Circuits and Systems, pp. IV-333-IV-336, May 28-31, 2000, Geneva, Switzerland.
Novel Voltage-Controlled Grounded Resistor, G. Wilson et al., Electronics Letters, vol. 25, No. 25 pp. 1725-1726, Dec. 7, 1989.
New CMOS Resistor Implementation for Linear IC Applications, P.M. Vanpetegham et al., Electronics Letters, vol. 24, No. 5, pp. 288-290, Mar. 3, 1988.
New CMOS Floating Voltage-Controlled Resistor, K. Nagaraj, Electronics Letters, vol. 22, No. 12, pp. 667-668, Jun. 5, 1986.
High Frequency Saturated CMOS Floating Resistor For Fully-Diffrential Analogue Signal Processors, M. Steyaert et al., Electronics Letters, vol. 27, No. 18, pp. 1609-1611. Aug. 29, 1991.
A New Floating Resistor for CMOS Technology, S.P. Si
Anglehart James
Concordia University
Cunningham Terry D.
Renault Ogilvy
LandOfFree
Multi-mode current-to-voltage converter does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multi-mode current-to-voltage converter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-mode current-to-voltage converter will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2851373