Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement
Reexamination Certificate
2003-02-04
2004-06-22
Nguyen, Patricia (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including particular biasing arrangement
C330S051000, C330S288000
Reexamination Certificate
active
06753734
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to a circuit for biasing a transistor, and, more particularly, to a circuit that is capable of biasing a transistor into a plurality of output power modes.
BACKGROUND OF THE INVENTION
Modern wireless communications devices, such as cellular telephones, are held to ever-higher performance standards. The devices must support various communication standards, transmissions must be clear and undistorted, and the battery in the devices must be small and have a long life. Such performance standards require high operational versatility from the devices transmitter, and in particular, a power amplifier therein. Generally, power amplifiers comprise a transistor and a bias circuit that generates a direct-current (“DC”) bias signal (comprising both a voltage and a current) to be applied to the transistors input terminal to establish its operating point. (The operating point of a transistor may be defined as the point on the transistor's characteristic curves at which the transistor will operate in the absence of an input signal. See, e.g., John Markus, Electronics Dictionary 445 (4th ed. 1979).) Because changes in the DC bias signal affect the operating point of the transistor—which may adversely affect performance of the amplifier—the DC bias signal must be very stable (preferably within 5% to 15%) and unaffected by variations in temperature or in the power supply voltage.
Often power amplifying transistors are required to switch between several operating points, an operation also known as mode control. The mode of a communication device may depend, inter alia, on the signal modulation schemes supported by the communication device or on the desired output power level. In the former case, a constant-envelope modulation scheme may require an operating point that ensures efficient signal amplification, whereas a variable-envelope modulation scheme may require a different operating point that is suitable for linear (i.e., distortion-free) amplification. Often, when the amplitude of an input signal is changed to adjust output power level, the amplifier's operating point may need to be adjusted also to prevent signal distortion (i.e., non-linearity) and to improve efficiency of the amplifier. Such multi-mode power amplifiers require bias circuits that are capable of generating several levels of stable DC bias signal.
Among known bias circuits, current-mirror-based bias circuits provide stability against variations in temperature or the power supply voltage. However, current mirror-based bias circuits typically provide one level of stable DC bias signal, although manual tuning of such a bias level may be possible. Typical current-mirror configuration comprises a master transistor base-coupled to a slave transistor, a transistor that is to be biased. The base of the master transistor is coupled to its collector, thus providing a voltage feedback that stabilizes bias signal provided by the master transistor to the slave transistor. The ratio of the transconductances of the master and slave transistors define magnitude of that bias signal. An example of such current-mirror-based bias circuit for use in RF power amplifiers is disclosed in U.S. patent application Ser. No. 09/875,117 to Liwinski and owned by the assignee of this invention.
Varying the magnitude of DC bias signal generated by the master transistor typically results in increased complexity, size, cost and power requirements of the bias circuit. For instance, introducing resistive elements at the base or collector of the master transistor for adjusting the magnitude of the bias signal by varying impedance of such resistive elements is cumbersome. As expected, such resistive elements consume power, dissipate heat and also require the bias circuit to operate from a power supply voltage that is significantly higher than the amplifier requirements.
U.S. Pat. No. 4,064,506 to Cartwright, Jr. discloses designs for digital-to-analog converters based on the current mirror configuration. The various circuits disclosed or suggested by the current mirror arrangement of Cartwright receive a digital input at the master transistor and results in an analog output at the slave transistor. The current mirror disclosed in Cartwright, Jr. patent includes a master transistor that is a composite transistor that comprises a plurality of transistor elements selectively paralleled via switches. Thus, by selectively enabling or disabling such single transistors, the transcodunctance of the master transistor may be changed resulting in changing the magnitude of the output current typically to be a fraction (or a multiple) of a reference current.
The circuits disclosed by Cartwright, Jr., however, do not disclose biasing of an amplifier at more than one level since it is directed to directing the slave transistor to provide a mirror current (the output current) reflecting the input digital signal in a D/A converter. By choosing suitable slave transistors the total mirrored current through them may be added to effect digital-to-analog conversion. Furthermore, the circuits disclosed or suggested by Cartwright, Jr. are suitable for stable operation with power supplies providing a significantly larger voltage than the device voltage or a junction voltage. However, these circuits are not suitable as RF power amplifiers because of the presence of a direct feedback resulting in the voltage fluctuations at the gate of the master transistor transferring to its drain, thereby changing the reference current, and consequently adversely effecting stability of the bias signal. Not surprisingly, the disclosed circuits also lack adequate stability against variations in supply voltage and temperature. Notably, the disclosed circuits of Cartwright are entirely implemented with field effect transistors (FETs) that are not suitable for efficient RF signal amplification due to their limited bandwidth.
The replacement of the FET's used as mirroring transistors with bipolar transistors having characteristics that are more suitable for RF power amplification results in a combination of FETs and BJTs that provides insufficient current gain resulting in instability and/or excessive variation with change in temperature or power supply voltage. Moreover, yet another drawback of such a strategy is the complexity involved in fabrication of two different types of transistors (e.g. BJTs and FETs) on a single integrated circuit.
Providing multiple-level biasing of an RF amplifier, to improve the efficiency of operation, continues to be a challenge due to the need to operate the amplifier from low voltage supplies (typical of mobile devices) while providing stable performance in face of temperature and supply voltage variations.
SUMMARY OF THE INVENTION
The invention disclosed herein overcomes, inter alia, these challenges and teaches high-efficiency operation of a RF amplifier by employing multiple-level biasing while operating from low-voltage supplies with provision for stable performance in face of temperature and supply voltage variations.
In accordance with the invention, a bias circuit is provided for generating a plurality of discrete bias levels for one or more RF power amplifying transistor(s). In a preferred embodiment, the bias circuit includes (1) a composite master transistor, which comprises at least one transistor element connected to the RF power amplifying transistor in a current-mirror configuration, (2) a switch connected to the at least one transistor element to control its operation, and (3) a feedback circuit by which variations in the voltage at the collector of the composite master transistor are used to stabilize the voltages at the bases of the composite master transistor and the slave transistor. In a preferred embodiment of the invention, the feedback circuit comprises an emitter-follower buffering amplifier connected at its emitter to the base of the composite master transistor and at its base to the collector of the composite master transistor.
In another embodiment of the invention, the
Arell Thomas W.
Liwinski Henry Z.
Anadigics Inc.
Nguyen Patricia
Pennie & Edmonds LLP
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