Multi-media processor architecture with high performance-density

Details Multi-media processor architecture with high performance-density Multi-media processor architecture with high performance-density

1996-07-19

1999-09-28

Faile, Andrew I.

Television

Image signal processing circuitry specific to television

395 17, H04N 514

Patent

active

059596899

ABSTRACT:
A multimedia system has unprogrammable task-specific processors of high performance-density. The task-specific processors perform primitive functions that together constitute a video algorithm. The task-specific processors are interconnected via a high-speed communication module whose interconnectivity is controlled by an arbiter. The arbiter stores a data flow graph. A fully programmable general-purpose processor of low performance-density carries out those tasks that are not readily mapped onto the primitive functions. This configuration with different levels of performance-density and programmability increases overall system performance-density with regard to the prior art.

REFERENCES:
patent: 4811052 (1989-03-01), Yamakawa et al.
patent: 5113494 (1992-05-01), Menendez et al.
patent: 5140444 (1992-08-01), Klein et al.
patent: 5392446 (1995-02-01), Tower et al.
patent: 5506998 (1996-04-01), Kato et al.
patent: 5588152 (1996-12-01), Dapp et al.
Mahon et al, "Hewlet-Packard Precision Architecture: the Processor", Hewlet-Packard Journal Aug. 1986.

Affiliated with

Also associated with

Rating

Multi-media processor architecture with high performance-density does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-media processor architecture with high performance-density, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-media processor architecture with high performance-density will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-709359