Multi-line scan mark verification circuit

Details Multi-line scan mark verification circuit Multi-line scan mark verification circuit

1980-05-30

1982-11-02

Boudreau, Leo H.

Communications: electrical

Digital comparator systems

235436, 235456, G06K 714

Patent

active

043575960

ABSTRACT:
In a document scanning scheme where data is preceded on the document by a preprinted document scan mark, circuitry is employed to utilize multiple line scans of the scan mark by a line scan camera to verify the presence of a scan mark and avoid erroneous response to random marks on the document.

REFERENCES:
patent: 3463906 (1969-08-01), Chiang
patent: 3528059 (1970-09-01), Spanjersberg
patent: 3578953 (1971-05-01), Milford
patent: 3643069 (1972-02-01), Kikuchi
patent: 3810094 (1974-05-01), Mori et al.
patent: 3852573 (1974-12-01), Dolch
patent: 3852715 (1974-12-01), Morimoto
patent: 4009467 (1977-02-01), Kodera et al.
patent: 4298859 (1981-11-01), Feilchenfeld
patent: 4300123 (1981-11-01), McMillin et al.

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