Multi-level vROM programming method and circuit

Static information storage and retrieval – Read only systems – Fusible

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365103, 3652257, 257530, 257 50, G11C 1700

Patent

active

055724582

ABSTRACT:
A method and system for programming vROM programmable memories using antifuses fabricated from undoped amorphous silicon as a high resistance link or layer between two metal layers. Whenever a programming voltage higher than a normal operating voltage is applied across the link between the two metal layers, the resistance of the link is reduced by transforming the insulating amorphous silicon into conducting polysilicon. This causes a closed or conductive link to be formed between the two metal layers. In the programming of the vROM, current is actively pumped to the link; and a current measurement or check is made prior to the application of the programming voltage to determine whether the link already has been programmed. Immediately following the application of the programming voltage, the current through the link again is checked to determine proper programming of the link. The link then is allowed to cool and a lower voltage annealing pulse is applied across it to re-melt any fine filament fractures which may have occurred during cooling. The system and method provide a continuous verification of the proper programming of the link, including an indication of whether a weak or incomplete programming of a link takes place.

REFERENCES:
patent: 4814853 (1989-03-01), Uchida
patent: 5257222 (1993-10-01), Lee
patent: 5272388 (1993-12-01), Bakker
patent: 5371414 (1994-12-01), Galbraith

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