Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
1998-09-22
2003-09-09
Vigushin, John B. (Department: 2827)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S768000, C361S803000, C361S818000
Reexamination Certificate
active
06618267
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
This invention generally relates to electronic packaging, and more specifically relates to three-dimensional packaging to package electrical devices.
2. Background Art
The fabrication of integrated semiconductor devices involves forming a plurality of devices on a semiconductor wafer. The wafer is then divided up into a plurality of pieces called “chips” or “semiconductor dies,” with each chip comprising one or more semiconductor devices. Each chip is then placed in a “package” that has external connections (generally called “pins” or “leads”) to provide accesses to signals on the chip.
Many different packages for integrated circuits have been developed. One popular package is the dual in-line package (DIP). The DIP is commonly a plastic package for many commercial applications, but also comes in ceramic packages for applications that require higher operating temperature. As the number of pins on a package were increased, new packages were developed, such as the pin grid array (PGA). A PGA package typically has rows and columns of pins in an array, and may be either plastic or ceramic as well. As the size of electronic boards continues to shrink, other packages have been developed that provide a higher density of connections in a given space.
For example, surface-mount devices have been developed that have a ceramic package (or module) with solder pads that provide connections to the integrated circuit. These solder pads may be made much smaller than the area required by a pin in prior art DIP and PGA packages, resulting in a higher connection density. These types of surface-mount technology (SMT) packages have various names such as small outline integrated circuit (SOIC), chip scale package (CSP), small outline transistor (SOT), small outline J-lead (SOJ), fine pitch ball grid array (FPBGA), and micro-ball grid array (&mgr;-BGA).
Surface mount modules may be mounted on a variety of different types of circuit boards, circuit modules, or other substrates (referred to herein generically as a “system board”). A system board designed to receive a surface mount module typically provides landing pads that align with the landing pads on the module. Solder balls or solder bumps may be formed on either the module landing pads, the system board landing pads, or both. The surface mount module is then placed on the system board and the entire assembly is heated until the solder balls flow and form a good electrical connection between landing pads. The array of solder balls thus serve as an interconnect mechanism between the landing pads on the module and the landing pads on the system board.
As an example of surface mount modules, ball grid array (BGA) and column grid array (CGA) chip carrier modules have used arrays of solder balls or columns (sometimes referred to as cylinders) as input and output connections. In this application, the term “solder balls” will be used generically to refer to the balls, bumps, columns, cylinders or other suitable connections used as surface mount module interconnects. Generally, the array of solder balls are arranged on a dense pitch of 1.0 and 1.27 millimeters. With a dense array of solder balls covering one side of the module, BGA and CGA modules can provide a large number of input and output connections to the chip in the module without using excessive space.
When the modules are connected to the system board, the modules are flipped over and placed so that the array of solder balls are aligned with the corresponding array of landing pads on the system board. The module and system board are then heated, allowing the solder paste, which is screened on an array of landing pads, to melt and flow into the system board. This establishes the physical and electrical connection between the module and the system board.
Designers are attempting to put more and more packages on one system board. This is happening for several reasons. First, having all the functions on one board makes the design of the system cheaper. Second, designers have become forced to put everything on one board because the physical size of the devices they are developing are becoming much smaller. For instance, global positioning systems, which are very complex digital and analog devices, are being designed now that are hand-held. Such devices require that a large number of packages fit onto one board. The problem that designers are facing is that they are reaching the limits of current board design in that they can pack no more packages on a single board, yet they still desire that more functionality be placed on one board. Also, by using one system board, if a customer only needs the functionality of one part of the board, the only choices the customer has are to either buy the entire board and not use part of the functionality or buy another, completely different board.
One solution to these problems that some designers have tried is to create multi-level packages. By using multi-level packages, the system board can be made to grow upward instead of outward. Thus, more circuits may be packed onto the same two dimensional boards. These multi-level packages generally have multiple levels of chips, each level of chips being attached to the next level of chips through some type of connection means (SOJ, SOIC, etc.).
There are several problems with multi-level chip designs. First, the multi-level designs do not readily allow for “mix and match” components. In other words, if a customer wishes to use a first company's digital signal processor (DSP) with a different company's radio frequency (RF) electronics, the customer basically has to make his or her own system board on which to place these various packages. This can be very expensive and time consuming.
Second, radio frequency or electrical shielding is limited or nonexistent in these multi-level packages. This limits the types of devices that can be placed in a multi-level package. Current multi-level packages that contain RF and digital devices will perform poorly because of the lack of electrical shielding between the RF and digital devices. For mixed packages, electrical shielding is very important because digital devices will generally emit electrical emissions at around the frequency of operation and at harmonics thereof. These emissions will negatively affect both RF components and, to a lesser degree, other digital components. RF components may begin to intermittently track the frequency or harmonics of the digital components. Or RF components may “add” these stray emissions to their input or output data stream, thus yielding incorrect data. In addition, RF components will generally emit their own electrical radiation. This radiation may affect the digital devices if the devices are not isolated in an insulating package, although the effect of this radiation is somewhat less than the effect of digital radiation on RF components.
There are a variety of techniques used to reduce or eliminate electrical radiation between or from digital or RF components. For instance, ground planes for the two devices may be kept completely separate or are joined at only one point. In addition to this method, a well-known and respected method of reducing radiation from a device (particularly an RF device) is a Faraday shield. Faraday shields are generally “cans” made of metal. The can is placed over sensitive components and the metal can is then grounded. The grounded metal layer of the can prevents electromagnetic emissions emitted inside the can from escaping the can. The grounded layer also prevents electrical emissions emitted outside the can from entering the inner portion. These cans are generally grounded in several places around the can's periphery.
Current multi-level packages, however, do not allow for cans or other shielding to prevent or reduce the effects of electronic radiation. Thus, mixed digital and RF components cannot be used together in a multi-level device without having each device exposed to possible electronic radiation and its accompanying errors.
Without a way to
Dalal Hormazdyar M.
Gaudenzi Gene Joseph
Capella Steven
Vigushin John B.
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