Multi-level digital filter

Details Multi-level digital filter Multi-level digital filter

1974-09-17

1976-03-23

Atkinson, Charles E.

Registers

Transfer mechanism

Traveling pawl

333 18, 333 28R, G06F 1534

Patent

active

039462145

ABSTRACT:
A multi-level digital filter system applicable to modems is provided. The incoming data is read serially into M shift registers and read out in parallel by M further shift registers under the control of an M-bit clock, where M=log.sub.2 N and N is the number of levels. After appropriate conditioning by a logic control circuit, the parallel outputs are filtered separately by M digital shaping filters. The shaping filters each comprise a chain of shift registers the outputs of which are weighted by a resistor network and summed to produce a desired time response, which in an exemplary embodiment is the inverse Fourier transform of an ideal low-pass filter. Summing of the filter outputs produces an N-level signal. Specific examples of three-, four-, five-, six- and eight-level systems are disclosed.

REFERENCES:
patent: 3629509 (1971-12-01), Glaser
patent: 3638122 (1972-01-01), Gibson
patent: 3651316 (1972-03-01), Gibson
patent: 3665171 (1972-05-01), Morrow
patent: 3699321 (1972-10-01), Gibson
patent: 3775688 (1973-11-01), Hinoshita et al.

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