Multi-layered titanium nitride barrier structure

Details Multi-layered titanium nitride barrier structure Multi-layered titanium nitride barrier structure

1998-12-22

2002-06-25

Thomas, Tom (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S760000, C257S764000

Reexamination Certificate

active

06410986

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a titanium nitride barrier structure for use in the metallization of integrated circuit devices and, more particularly, to the use of a multi-layer titanium nitride structure that exhibits optimal stress characteristics while maintaining a relatively thin layer profile.
In the semiconductor integrated circuit industry, titanium nitride (TiN) is commonly used as an underlayer for aluminum-alloy metallization contacts on silicon-based devices, as well as a nucleation layer in contact vias for the tungsten plugs.
FIG. 1
illustrates an exemplary arrangement where TiN is used as a contact underlayer. As shown, a first titanium layer
10
is deposited to cover a dielectric layer
12
on the surface of substrate
14
. Titanium layer
10
is used to aid the adherence of TiN layer
16
to dielectric layer
12
. An aluminum-alloy (Al-alloy) contact layer
18
is then deposited over TiN layer
16
. An additional TiN overlayer
20
may be deposited over Al-alloy contact layer
18
to reduce the reflectivity of contact layer
18
during subsequent lithography process. An exemplary arrangement where TiN is used as a nucleation layer is shown in FIG.
2
. In this case, a first Ti layer
30
is deposited to cover sidewalls
32
and floor
34
of via
36
. A TiN layer
38
is then deposited over Ti layer
30
, followed by the tungsten (W) plug material
40
.
In either embodiment, the titanium nitride is typically deposited using physical vapor deposition (PVD) or sputtering. As illustrated above, a Ti layer is first formed, since TiN does not adhere well to a silicon surface. A pure Ti target may be used to deposit the initial titanium layer, using an argon (Ar) atmosphere. Subsequent to the formation of the initial Ti layer, nitrogen gas may be introduced to effect the formation of TiN on the titanium surface. Particularly, the N
2
gas can react at one or more places with the Ti atoms. Moreover, the N
2
gas can react with the Ti target and form a layer of TiN on the surface of the target. Such a mode of deposition is often defined in the art as the “nitrided”, “poisoned”, or “non-metallic” mode of TiN deposition, since the Ti target is “poisoned”—only TiN will now be possible with this target (that is, if the process calls for subsequent deposition of pure titanium, the target must either be cleaned or replaced). Alternatively, the N
2
gas can react with the Ti atoms that have been released by the target and are in the atmosphere between the target and wafer surface, as well as with the titanium atoms on the wafer surface itself In both cases, a TiN layer will be formed on the wafer. This mode of deposition is commonly referred to in the art as “non-nitrided”, “non-poisoned”, or “metallic”, since metallic Ti atoms are sputtered from the Ti target, even though TiN is ultimately deposited on the wafer.
Since the two deposition processes are different, significant variations in TiN film properties can be envisioned when depositing TiN in either mode. For example, the deposition rate in the “metallic” mode (i.e., “non-poisoned”) is about two to three times faster than the deposition rate in the non-metallic mode (i.e., “poisoned”). With ever-decreasing dimensions of silicon integrated circuits, contact (
FIG. 1
) and via (
FIG. 2
) sizes are also decreasing. As the aspect ratio (i.e., the ratio of height-to-diameter) of these openings increases, the conventional sputtering techniques described above begin to become problematic. For example, these methods can no longer provide adequate TiN film thickness along the sidewalls or bottom wall of contact vias—precisely the areas where these barriers are most needed. The simple solution of merely lengthening the process time to form a thicker TiN barrier layer is not acceptable, since the layer then exhibits unreasonably high levels of mechanical stress. Additionally, thick sputtered TiN films tend to form micro-cracks to relieve this stress, where these micro-cracks then form unwanted diffusion paths for the subsequently deposited aluminum (or other fluorine-containing gas species used in subsequent tungsten deposition).
One solution to this problem is to use a chemical-vapor deposition (CVD) process for the titanium nitride. Although a CVD-TiN process addresses the concerns mentioned above, the process itself is expensive and time-consuming—requiring extensive investment in the specialized equipment necessary to perform the CVD process. Moreover, the CVD process requires the use of certain precursor chemicals to initiate the formation of the TiN, and the impurity content of these precursors may be unacceptable for certain fine-line sub-micron integrated circuit applications.
Therefore, a need remains in the art for overcoming the thickness-limited problems associated with sputtered TiN films while requiring the use of a completely different fabrication process.
SUMMARY OF THE INVENTION
The need remaining in the art is addressed by the present invention, which relates to a titanium nitride barrier structure for use in the metallization of integrated circuit devices and, more particularly, to the use of a multi-layer titanium nitride structure that exhibits optimal stress characteristics while maintaining a relatively thin layer profile.
In accordance with the present invention, a plurality of relatively thin TiN layers are deposited, using the well-known deposition techniques described above, to form a multi-layer TiN structure of the desired thickness. The multi-layer structure results in improved coverage of via sidewall and bottom surfaces, while the multi-layer structure also allows for inter-layer stress accommodation so as to avoid the mechanical stress problems associated with the relatively thick TiN layers of the prior art.
In a first embodiment of the present invention, “chemical” multi-layering of TiN is performed, where the chemical composition of the TIN structure is altered, layer by layer, during the deposition process. That is, the ratio of N
2
gas to argon gas (N
2
/Ar) is altered to form TiN layers of various compositions and different N/Ti ratios or stoichiometry. For example, for a given Ar content (e.g., 55 sccm), the N
2
content may be altered between 15 and 65 sccm. Additionally, “chemical” multi-layering can be achieved by alternating between the two types of deposition described above, variously referred to as “nitrided” and “non-nitrided”.
In an alternative embodiment of the present invention, “thermal” multi-layering of TiN may be used, where the TiN multi-layer structure is formed using at least two chambers having different ambient temperatures, for example, one chamber maintained at room temperature and a second chamber maintained at 400° C. When the TiN layers are deposited at different temperatures, the stress state of each layer is altered, allowing for inter-layer stress accommodation and the prevention of micro-crack formation.
A third embodiment of the present invention, referred to as “mechanical” multi-layer may also be used. In a first arrangement of this embodiment, mechanical interfaces between the TiN layers are formed by interleaving pure Ti layers with the TiN layers, thus forming the necessary stress accommodation interfaces. Alternatively, “pseudo-interfaces” can be formed by, for example, altering the power level during TiN deposition or deliberately interrupting the deposition process. Any of these techniques results in the creation of “interfaces” within the multi-layer TiN structure. It is to be noted that the Ti/TiN/Ti/TiN . . . mechanical multi-layer arrangement should only be used with aluminum alloys, since the titanium is known to react with tungsten and would therefore have a deleterious effect on the tungsten plug in a via structure.
Various other embodiments of the present invention will become apparent during the course of the following discussion and by reference to the accompanying drawings.


REFERENCES:
patent: 4783248 (1988-11-01), Kohlhase et al.
patent: 5240880 (1993-08-01), Hindman et al.
patent: 5395795 (1995-03-01),

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