Multi-layered substrate having a fine wiring structure for LSI o

Stock material or miscellaneous articles – Structurally defined web or sheet – Including aperture

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427 86, 427 89, 427 97, 428132, 428133, 428458, 428901, B32B 310, B32B 1508

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045698767

ABSTRACT:
Good electrical connection between adjacent metal layers in a multi-layered substrate is provided by embedding a conductive material in via-holes in the insulator which separates the adjacent metal layers. This conductive material can be a low temperature sintered metal such as gold, or a conductive organic paste. The presence of the conductive material avoids problems associated with photoresist material that adheres to the side walls of the via-holes during the metallization process.

REFERENCES:
patent: 4360570 (1982-11-01), Andreades et al.
patent: 4381327 (1983-04-01), Briere
"MCP via Configurations", IBM Technical Disclosure Bulletin, vol. 24, No. 5, (Oct. 1981), pp. 2575-2576, O. R. Abolitia, G. V. Elmore and J. Funari.
"Controlled Diffusion Bonding in Multilevel Package", IBM Technical Disclosure Bulletin, vol. 24, No. 12, (May 1982), pp. 6364-6365, D. Clocher, J. Gow, III and H. S. Hoffman.
"High Reliability Metallurgical Structure for Multilevel Substrate Wiring", IBM Technical Disclosure Bulletin, vol. 24, No. 12 (May 1982), p. 6370, W. B. Archey, K. L. Elias and W. J. Slattery.

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