Multi-layered, single crystal field effect transistor

Details Multi-layered, single crystal field effect transistor Multi-layered, single crystal field effect transistor

2001-04-03

2004-04-20

Loke, Steven (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Field effect transistor

C257S616000, C257S194000

Reexamination Certificate

active

06724019

ABSTRACT:

REFERENCE TO FOREIGN PRIORITY APPLICATIONS
This application claims priority to Japanese Patent Application No. P2000-159544.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having a modulation doped field effect transistor and a manufacturing method thereof, and, more particularly, to a semiconductor device in which a modulation doped field effect transistor having a channel formed in a multi-layered film comprising single-crystal silicon and single-crystal silicon-germanium, and at least one MOSFET or a bipolar transistor, are realized on one identical substrate, and a manufacturing method thereof.
2. Description of the Background
Existing p-type modulation doped field effect transistors (pMODFET), in which a p-channel is formed in a multi-layered film comprising single-crystal silicon and single-crystal silicon-germanium, are described, for example, in Electronics Letters, 1993, vol. 29, p. 486 (“document 1”). A cross sectional structure of an existing pMODFET is shown in
FIG. 45
of document 1.
In
FIG. 45
, reference numeral
101
denotes a silicon substrate, wherein a buffer layer
102
comprising single-crystal silicon is formed on the silicon substrate
101
. A carrier supply layer
103
comprising p-type single-crystal silicon and a spacer layer
104
comprising single-crystal silicon are formed on the buffer layer
102
, and a p-type channel layer
105
comprising single-crystal silicon-germanium and a cap layer
106
comprising single-crystal silicon are successively formed. Since the lattice constant of single crystal germanium is larger by about 4% than the lattice constant of single-crystal silicon, the single-crystal silicon-germanium layer undergoes compressive strain by being put between the single-crystal silicon layers. As a result, since it forms a well layer of lower energy relative to holes in a valance band, holes supplied from the carrier supply layer
103
are collected in the channel layer
105
to form a two-dimensional hole gas to conduct transistor operation. After forming gate electrodes
107
and
108
, boron ion is selectively implanted to form a source
109
and a drain
110
. Then, the periphery of the transistor is etched to form electrodes
111
to the source and the drain.
For pMODFET, an example of using a buffer layer comprising single-crystal silicon-germanium and forming a channel layer of higher germanium content than the buffer layer is also reported, for example, in IEEE Electron Device Letters 1993, vol. 14, p. 205, wherein a buffer layer with a germanium content of 70% is formed, on which a channel layer comprising single crystal germanium is formed between the carrier supply layer and the barrier layer. Improvement for the mobility in the channel is intended by increasing the germanium content as described above.
In the same manner, an existent n-type modulation doped field effect transistor, (nMODFET) in which an n-channel is formed in a multi-layered film comprising single-crystal silicon and single-crystal silicon-germanium, is described, for example, in Electronics Letters, 1992, vol. 28, p. 160.
FIG. 46
shows the cross sectional structure of the existent nMODFET.
In
FIG. 46
, reference numeral
101
denotes a silicon substrate, wherein a buffer layer
112
comprising single-crystal silicon-germanium is formed on the silicon substrate
101
. The buffer layer
112
constitutes a virtual substrate having a lattice constant inherent to silicon-germanium at the surface, for which good crystallinity is required on the surface. When single-crystal silicon-germanium is epitaxially grown on a single-crystal silicon substrate, since it tends to grow at an identical atom distance with that in the substrate, the single-crystal silicon-germanium layer undergoes compressive strain and the lattice constant in the grown plane is the same as the lattice constant of single-crystal silicon. Then, it is necessary to positively introduce dislocation for relieving the strain in order to eliminate the effect of single-crystal silicon of the substrate. For example, when the germanium content is changed so as to be 5% on the side of the silicon substrate and 30% on the side of the surface with the thickness of the silicon-germanium layer of 1.5 &mgr;m, dislocation can be confined only within the inside of the buffer layer
112
to make the crystallinity favorable at the surface. A second buffer layer
113
comprising single-crystal silicon-germanium and having the same germanium content as that on the surface of the buffer layer
112
is formed on the buffer layer
112
to form a barrier layer to carriers. Then, a channel layer
114
comprising single-crystal silicon, a spacer layer
115
comprising single-crystal silicon-germanium, and a carrier supply layer
116
comprising n-type single-crystal silicon-germanium, are formed. With such a multi-layered film structure, since the single-crystal silicon layer
114
grows with the lattice constant of single-crystal silicon-germanium, it undergoes tensile strain. As a result, the energy to electrons in the conduction band is lowest in the single-crystal silicon channel layer
114
, and electrons supplied from the carrier supply layer
116
formed by way of the spacer layer
115
are stored in the channel layer
115
to form two-dimensional electron gas. A cap spacer layer
117
comprising single-crystal silicon-germanium, and a cap layer
118
comprising single-crystal silicon as the surface protection film, are formed on the surface. Gate electrodes
119
and
120
are formed, and a source
111
and a drain
112
are formed by implantation of phosphorus ion. Finally, by etching the periphery of the transistor, the multi-layered film comprising the single-crystal silicon and single-crystal silicon-germanium as the intrinsic region of the transistor, is fabricated into an island shape, and electrodes
123
to the source and the drain are formed adjacent to the island shape.
Further, nMODFET and pMODFET formed simultaneously in the multi-layered film of single-crystal silicon and single-crystal silicon-germanium in a complementary type is described, for example, in IEEE Transactions on Electron Devices, 1996, vol. 43, p. 1224.
FIG. 47
shows a cross sectional shape of the existent complementary modulation doped field effect transistor (cMODFET).
In
FIG. 47
, reference numeral
101
denotes a silicon substrate, and a buffer layer
124
comprising p-type single-crystal silicon-germanium is formed on the silicon substrate
101
. A virtual substrate of satisfactory crystallinity with the lattice constant being the same as that of the single-crystal silicon-germanium layer is formed by relaxing the strain due to the difference of the lattice constant between the silicon substrate
101
and the buffer layer
124
only at the inside of the buffer layer
124
. An n-well
125
is formed by ion implantation of n-type dopant only in the region of the forming pMODFET. On the buffer layer
124
, are successively laminated a spacer layer
126
comprising single-crystal silicon-germanium having the same germanium content as that of the buffer layer, an n-type carrier supply layer
127
comprising n-type single-crystal silicon-germanium also having the same germanium content, a second spacer layer
128
comprising single-crystal silicon-germanium, an n-type channel layer
129
comprising single-crystal silicon, and a p-type channel layer
130
comprising single-crystal silicon-germanium with a higher germanium content than that on the surface of the buffer layer
124
. After covering the surface with a cap layer
131
comprising single-crystal silicon and a silicon oxide film
132
, a gate electrode
133
is formed. Using the gate electrode as a mask, a p-type dopant is ion implanted into the region for forming the pMODFET deeper than the p-type channel layer
130
, to form a source
134
and a drain
135
of pMODFET, while n-type dopant is ion implanted in the region forming nMODFET deeper than the n-type channel layer
129
, to form a source
136
and a

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