Multi-layered semiconductor structure

Details Multi-layered semiconductor structure Multi-layered semiconductor structure

2005-12-20

2005-12-20

Young, Christopher G. (Department: 1756)

Radiation imagery chemistry: process, composition, or product th

Radiation modifying product or process of making

Radiation mask

C430S022000, C430S296000, C430S942000, C257S797000, C438S011000, C438S401000, C438S975000

Reexamination Certificate

active

06977128

ABSTRACT:
A multi-layered semiconductor structure having an alignment feature for aligning a lithography mask and that may be used in connection with a SCALPEL tool. The present invention is particularly well-suited for sub-micron CMOS technology devices and circuits, but is not limited thereto. The present invention advantageously permits use of an electron beam source for both alignment and exposure of a lithography mask on a semiconductor wafer. The present invention also advantageously enables the formation of an alignment feature early (i.e., zero-level) in the semiconductor device fabrication process.

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