Multi-layered metal routing technique

Details Multi-layered metal routing technique Multi-layered metal routing technique

2008-04-15

2008-04-15

Vu, Hung (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

With particular signal path connections

C257S208000, C257S211000, C257S758000, C257S776000

Reexamination Certificate

active

11338316

ABSTRACT:
In accordance with the objectives of the invention a new method and structure is provided for the creation of multiple overlying layers of interconnect metal. A channel is reserved for the creation of via interconnects, no vias are placed on metal lines. The metal lines are stacked and parallel, whereby a space is provided between lines that is reserved for the creation of vias for layer interconnection. This structure can be repeated, the vias are placed on the therefore reserved channel, interconnections are provided to the interconnect traces.

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