Multi-layered inductance element

Inductor devices – Coil or coil turn supports or spacers – Printed circuit-type coil

Reexamination Certificate

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Details

C336S223000, C336S232000

Reexamination Certificate

active

06657530

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a multi-layered inductance element.
2. Description of Background Art
Layered inductance elements have been utilized in radio frequency circuits or other electric circuits. As disclosed in JP-A-5-267973, a conventional multi-layered inductance element includes a plurality of layered dielectric substrates and looped conductor lines interposed therebetween. The looped conductor lines are interconnected via through-holes, thereby exhibiting a spiral configuration as a whole.
FIGS. 18 and 19
illustrate an example of conventional multi-layered inductance elements. As shown in the drawings, the multi-layered inductance element includes a plurality of dielectric substrates
1
a
,
1
b
, and
1
c
, conductor lines
2
and
3
interposed therebetween, a through-hole
4
, and a pair of ground conducting layers
5
and
6
. As shown in
FIG. 19
, the upper ground conducting layer
5
is provided on the top surface of the uppermost dielectric substrate
1
a
among the multi-layered dielectric substrates
1
a
,
1
b
, and
1
c
while the lower ground conducting layer
6
is disposed on the bottom surface of the lowermost dielectric substrates
1
c.
The upper conductor line
2
is interposed between the dielectric substrates
1
a
and
1
b
while the lower conductor line
3
is interposed between the dielectric substrates
1
b
and
1
c
. The through-hole
4
is formed in the intermediate dielectric substrate
1
b
, resulting in that the upper and lower conductor lines
2
and
3
are electrically connected with each other via conducting materials inside the through-hole
4
.
As shown in
FIG. 18
, each of the conductor lines
2
and
3
has a looped shape although it is not closed completely. The hatched parts in
FIG. 18
depict parts of the conductor lines
2
and
3
overlapping with or superimposed over each other. Since one end of the conductor line
2
is connected with one end of the conductor line
3
via the through-hole
4
, conductor lines
2
and
3
cooperate to form a continuous spiral conductor line, which is analogous to a coil, having an inductance. When a direct current is applied to the spiral conductor line, the direction of the current flow in the conductor line
2
is the same as that in the conductor line
3
; for example, it is the clockwise direction as indicated by arrow I in FIG.
18
. In addition, when an alternating current is applied, the direction of the current flow at each moment in the conductor line
2
is the same as that in the conductor line
3
.
In connection with this kind of multi-layered inductance element, it has been considered that the upper and lower conductor lines
2
and
3
should extend over and coincide perfectly with each other when viewed along the vertical direction (direction of thickness) of the multi-layered inductance element. It has been also considered that the vertical distance between the conductor lines
2
and
3
is preferably small. The reason is that such a preferable structure will strengthen the coupling of electromagnetic fields around the conductor lines
2
and
3
, whereby the multi-layered inductance element can have a great inductance although its dimensions may be small.
In the illustrated conventional multi-layered inductance element, each of the conductor lines
2
and
3
is formed continuously so that the loop on the same plane is as long as possible. The sole through-hole
4
is utilized for connecting the upper and lower conductor lines
2
and
3
comprising the single spiral conductor line.
The conventional multi-layered inductance element structured as described above has drawbacks that it is difficult to restrain the difference between the designed target inductance and the resulting inductance affected by an error in dimensions by manufacturing. It is also very difficult to adjust or tune the difference.
The drawbacks will be described in more detail. In such a multi-layered inductance element, the correlation between the positions of the conductor lines
2
and
3
is an important factor in quality. For example, when at least one of the conductor lines
2
and
3
is out of position so that the conductor lines
2
and
3
does not coincide with each other, the coupling of electromagnetic fields around the conductor lines
2
and
3
is degraded, resulting in decrease of the inductance.
In addition, if the thickness of the dielectric substrate
1
b
and hence the distance between the conductor lines
2
and
3
is small, the coupling of electromagnetic fields around the conductor lines
2
and
3
is strengthened, resulting in increase of the inductance. On the contrary, if the thickness of the dielectric substrate
1
b
is large, the inductance is decreased.
Accordingly, dimensional errors, such as positional errors of the conductor lines
2
and
3
and an error in thickness of the dielectric substrate
1
b
, lead variations of inductance in products of multi-layered inductance element.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a multi-layered inductance element, wherein it is possible to restrain variations of inductance caused by errors in dimensions by manufacturing.
A multi-layered inductance element according to the present invention includes at least one dielectric substrate having a first and second surfaces, a first conductor line pattern, a second conductor line pattern, and a plurality of through-holes penetrating through the dielectric substrate. The first conductor line pattern includes a plurality of first conductor line segments being apart from each other and disposed on the first surface of the dielectric substrate, wherein the first conductor line segments exhibit a substantially looped configuration as a whole if adjacent first conductor line segments are connected with each other. The second conductor line pattern includes a plurality of second conductor line segments being apart from each other and disposed on the second surface of the dielectric substrate, wherein the second conductor line segments exhibit a substantially looped configuration as a whole if adjacent second conductor line segments are connected with each other. Each through-hole electrically connects one end of one of the first conductor line segments and one end of one of the second conductor line segments. Each of the first conductor line segments extends over at least a part of one of the second conductor line segments. The plurality of first conductor line segments and the plurality of second conductor line segments are connected by the through-holes, thereby forming a spiral conductor line in which a direction of current flow in the first conductor line pattern is the same as that in the second conductor line pattern. Each of the second conductor line segments includes a pair of end parts and a halfway part having a width which is smaller than that of the end parts. The end parts are connected to adjacent first conductor line segments via the through-holes.
With such a structure, the halfway part with a smaller width of each second conductor line element tends to cancel an inductance decrement when the conductor line patterns are dislocated in relation to each other. In addition, the plurality of through-holes contributes to cancel an inductance variation when the thickness of the dielectric substrate varies. Therefore, the structure can restrain variations of inductance caused by errors in dimensions by manufacturing multi-layered inductance elements.


REFERENCES:
patent: 4021705 (1977-05-01), Lichtblau
patent: 5629553 (1997-05-01), Ikeda et al.
patent: 6124779 (2000-09-01), Yamamoto
patent: 6175293 (2001-01-01), Hasegawa et al.
patent: 6175727 (2001-01-01), Mostov
patent: 2001/0041401 (2001-11-01), Ahn et al.
patent: 0 484 558 (1992-05-01), None
patent: 0 631 293 (1994-12-01), None
patent: 3-77360 (1991-04-01), None
patent: 4-148514 (1992-05-01), None
patent: 2695342 (1997-09-01), None

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