Multi-layer wiring structure with dummy patterns for...

Details Multi-layer wiring structure with dummy patterns for... Multi-layer wiring structure with dummy patterns for...

2007-01-09

2007-01-09

Trinh, Michael (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S531000, C257S516000, C257S200000, C438S381000

Reexamination Certificate

active

10898167

ABSTRACT:
A first area, a ring shape second area surrounding the first area, and a third area surrounding the second area are defined on the surface of a support substrate. A first wiring layer is disposed above the support substrate. A wiring is formed in the third area, dummy patterns being formed in the second area, and conductive patterns are not formed in the first area. A functional element is disposed above the first wiring layer and in the first area.

REFERENCES:
patent: 2002/0036335 (2002-03-01), Minami
patent: 2003/0039879 (2003-02-01), Ovshinsky et al.
patent: 2004/0084777 (2004-05-01), Yamanoue et al.
patent: 2003-140319 (2003-05-01), None

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