Multi-layer type semiconductor device with semiconductor element

Details Multi-layer type semiconductor device with semiconductor element Multi-layer type semiconductor device with semiconductor element

1990-09-20

1993-02-23

James, Andrew J.

Optical: systems and elements

Holographic system or element

Using a hologram as an optical element

359 48, 257 72, 257 84, H01L 2714, H01L 3100

Patent

active

051895005

ABSTRACT:
A multi-layer type semiconductor device is disclosed, in which a plurality of semiconductor layers are formed in vertically opposite directions. The multi-layer type semiconductor device is obtained by forming a first semiconductor layer, an insulating layer and a second semiconductor layer in the mentioned order on a main surface of a first substrate, forming a semiconductor device by using the second semiconductor layer as a base, with an exposed surface thereof directed upward, forming an insulating film on the semiconductor device, attaching a second substrate to the insulating film, thinning the first substrate to expose the first semiconductor layer, and forming a further semiconductor device by using the first semiconductor layer as a base, with an exposed surface of the first semiconductor layer directed upward. A single- chip type image forming system or sensing system may be provided by employing, as the semiconductor devices, a sensing device such as a photosensor, a pressure sensor or the like, a processing circuit for processing a signal received from the sensor, and a display device for displaying results of the processing. A large number of pads may be provided by arranging the pads on opposite surfaces of a chip.

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Furukawa, "Silicon-on-Insulator: Its Technology and Applications".
Maszara et al, "Wafer Bonding for SOI", Mat. Res. Soc. Symp. Proc., vol. 107 (1988), pp. 489-494.
Nishimura et al, "Three Dimensional IC for High Performance Image Signal Processor", Proceedings of the IEDM--International Electron Devices Meeting (1987), pp. 111-114.
Ahn et al, "Dissolution and Disintegration of Uniform SiO.sub.2 Layers During Direct Silicon Wafer Bonding", Mat Res. Soc. Symp. Proc., vol. 107, pp. 501-506.
Furukawa et al, "Applications of the Silicon Wafer Direct-Bonding Technique to Electron Devices", Applied Surface Science 41/42 (1989), pp. 627-632.

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