Multi-layer printed circuit with low noise

Details Multi-layer printed circuit with low noise Multi-layer printed circuit with low noise

2007-08-21

2007-08-21

Patel, Ishwar (I. B.) (Department: 2841)

Electricity: conductors and insulators

Conduits, cables or conductors

Preformed panel circuit arrangement

C174S260000

Reexamination Certificate

active

11055615

ABSTRACT:
A multi-layer printed circuit board having a low noise characteristic, the multi-layer printed circuit board includes at least one circuit layer; at least one isolation line for dividing the at least one circuit layer into at least two areas, the at least one isolation line forming an open pattern and the at least one isolation line extendedly forming a long neck line into the at least one area; and at least one capacitor placed at one side of the opening of the open pattern in any one of the areas.

REFERENCES:
patent: 4942400 (1990-07-01), Tarzaiski et al.
patent: 5068596 (1991-11-01), Banura
patent: 5561584 (1996-10-01), Tang
patent: 5587920 (1996-12-01), Muyshondt et al.
patent: 5736796 (1998-04-01), Price et al.
patent: 5926377 (1999-07-01), Nakao et al.
patent: 6219255 (2001-04-01), Teshome
patent: 6349038 (2002-02-01), Hailey
patent: 6473312 (2002-10-01), Hiratsuka et al.
patent: 7068518 (2006-06-01), Ueno et al.

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