Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
2000-03-14
2002-04-02
Gandhi, Jayprakash N. (Department: 2841)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S777000, C361S736000, C361S720000, C257S775000, C257S773000, C174S261000
Reexamination Certificate
active
06366466
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to electrical interconnects for printed circuit boards.
BACKGROUND OF THE INVENTION
When the space available for signal traces on printed circuit boards (“PCBs”) is limited, the signal line for connecting components may have to be routed along more than one PCB layer. As shown in
FIG. 1
, the signal line may comprise first signal trace
1
, which runs along first layer
2
, that is connected by via
9
to second signal trace
4
, which runs along second layer
5
. Via
9
adds capacitance to the signal line. This lowers the line impedance at the via, which creates an impedance discontinuity for the signal line.
Although this may be a third or fourth order effect for relatively low speed interconnects, such discontinuities can effectively limit the maximum frequency at which high speed, pipelined electrical signals may be driven along a high speed interconnect. Take, for example, the Direct Rambus memory channel, which a PCB may include for transmitting 300 MHz, or higher, clock signals, in a pipelined fashion, between components mounted to the PCB. (Because data is taken off both the falling and rising edges of the clock signal, the data transfer rate may be 600 M transfers, or more.) At such frequencies, variations in the impedance of a signal line may cause the transmitted signals to be reflected, which can degrade their quality.
The Direct Rambus memory channel can require signals to pass through dozens of vias before reaching their ultimate destination. For example, for PCBs having two RIMMS, the Direct Rambus memory channel may require signals, which originate at the memory controller, to pass through 40 or more vias before reaching termination. When signals must pass through multiple vias, the signal reflection that accumulates over the length of the bus, resulting from the additive effect of the impedance discontinuities that those vias create, may impact system performance. To prevent such signal reflection from causing undesirable effects, the device may have to be operated at a reduced frequency.
Accordingly, there is a need for an improved interconnect for a printed circuit board. There is a need for such an interconnect that enables signals to pass from one PCB layer to another through a via without generating impedance discontinuities that may require signals to be transmitted through the interconnect at a reduced frequency. The present invention provides such an interconnect.
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Horine Bryce D.
Leddige Michael W.
McCall James A.
Bui Hung
Gandhi Jayprakash N.
Seeley Mark V.
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