Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2000-06-28
2003-04-15
Paladini, Albert W. (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C361S803000, C361S792000, C174S255000
Reexamination Certificate
active
06548767
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a printed circuit board capable of improving an integration degree in mounting components and wiring by virtue of a core layer and built-up layers, and more particularly, to a multi-layer printed circuit board in which via-holes and conductive layers are formed on the core layer and on the built-up layers and the conductive layers are electrically connected, thereby improving an integration degree in mounting components and wiring of the printed circuit board as well as shortening the length of wiring.
2. Description of the Background Art
FIG. 1
is a sectional view showing a construction of a multi-layer printed circuit board in accordance with one conventional art.
As shown in the drawing, the multi-layer printed circuit board includes a copper thin film layer
11
formed between each insulation layer (insulating resin layer)
10
, a through hole
12
formed to penetrate a predetermined portion of the copper thin film layer
11
and the insulation layer
10
, and conductive layers
12
-
1
and
12
-
2
formed on the inner wall and the uppermost surface of the through hole
12
by electrodeless plating or electroplating. The through hole
12
is filled with an insulating resin.
The conductive layers
12
-
1
and
12
-
2
of the multi-layer printed circuit board are electrically connected with the copper thin film layer
11
formed between the insulation layers
10
.
However, the problem is that the conductive layers,
12
-
1
and
12
-
2
, which are connected with the copper thin film layers
11
formed between the insulation layers
10
, are also connected with the copper thin film layer
11
that is not required to be connected.
In addition, the through hole
12
is normally formed by using a drill that is adjusted by a computer numerical control method. Currently, it is possible to form a hole having a diameter of 250 &mgr;m, but the integration in mounting components for a high concentration and high integrity is reduced.
Also, a land (not shown) having a diameter of 100 &mgr;m necessarily exists in the vicinity of the hole for connection with other mounted components, which inevitably leads to a reduction in mounting components and wiring.
Moreover, since the wiring in the circuit pattern formed on the uppermost and the lowermost surfaces is formed by detouring the circumference of the hole
12
, the wiring of the circuit pattern is lengthened, and thus, a signal transmission is delayed and a noise occurs.
FIG. 2
is a sectional view showing a construction of a multi-layer printed circuit board in accordance with another conventional art.
As shown in the drawing, the multi-layer printed circuit board includes a first substrate
20
A, a core substrate
20
B and a second substrate
20
C.
The first substrate
20
A and the second substrate
20
C have the same construction, thus, descriptions are made only for the first substrate
20
A.
The first substrate
20
A includes a copper thin film layer
22
formed between insulation layers (insulating resin layers)
23
, a hole
27
formed to penetrate a predetermined portion of the copper thin film layer
22
and the insulation layer
23
, and first conductive layers
24
and
26
formed on the inner wall and on the surface of the hole
27
by the electrodeless plating or electroplating.
The core substrate
20
B is constructed by forming the copper thin film layers
20
on the upper and lower surface of the insulation layer
21
. The core substrate
20
B is attached between the first substrate
20
A and the second substrate
20
C. That is, after a resin
30
is, inserted between the first substrate
20
A and the core substrate
20
B and between the core substrate
20
B and the second substrate
20
C, when the substrates
20
A,
20
B and
20
C are pressed by applying heat, the resin
30
is melted, filling the hole
27
. And then as the resin
30
is hardened, the first substrate
20
A and the second substrate
20
C and the core substrate
20
B are attached to each other.
Thereafter, the through hole
28
is formed penetrating predetermined portions of the substrates
20
A,
20
B and
20
C, and second conductive layers
25
and
29
are formed on the inner wall and on the surface of the through hole
28
by the electrodeless plating or the electroplating. And then, a predetermined circuit pattern is formed on the uppermost and the lowermost surface of the substrate by a typical etching process.
In this conventional art, the second conductive layers
25
and
29
formed in the multi-layer printed circuit board are electrically connected with the copper thin film layers
20
and
22
formed between the insulation layers
23
and
30
.
However, since there exists the through hole
28
on the first substrate
20
A, the second substrate
20
C and the core substrate
20
B, the integration degree in mounting components and wiring are reduced.
In addition, since the wiring in the circuit pattern formed on the uppermost and the lowermost surfaces is formed by detouring the circumference of the hole
12
, the wiring of the circuit pattern is lengthened, and thus, a signal transmission is delayed and a noise occurs.
Moreover, as the second conductive layer
25
is formed on the first conductive layer
24
, the conductive layers formed on the upper and lower surface of the multilayer printed circuit board become thick. Thus, it is difficult to form a fine circuit pattern and its processes are complicated, resulting in a low productivity.
SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide a multi-layer printed circuit board in which via-holes and conductive layers are formed on the core layer and on the built-up layers and the conducive layers are electrically connected, thereby improving the integration degree in mounting components and wiring of the printed circuit board as well as shortening the length of wiring.
To achieve these and other advantages and in accordance with the purposed of the present invention, as embodied and broadly described herein, there is provided a multi-layer printed circuit board including a core layer having a first circuit pattern formed on the upper surface of a first insulation layer and a first conductive layer formed on the lower surface of the first insulation layer; and built-up layers formed on the upper and lower surface of the core layer and having a second circuit pattern electrically connected with the first circuit pattern.
To achieve the above object, there is also provided a method for fabricating a multi-layer printed circuit board including the steps of: forming a core layer in a manner that a first circuit pattern is formed on the upper surface of the first insulation layer and a first conductive thin film and a first conductive layer are formed on the lower surface of the first insulation layer; and forming built-up layers in a manner that a second insulation layer on the upper and lower surface of the core layer and a second circuit pattern is formed on the surface of the second insulation layer.
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patent: 5321210 (1994-06-01), Kimbara et al.
patent: 5347712 (1994-09-01), Yasuda et al.
patent: 5434751 (1995-07-01), Cole, Jr. et al.
patent: 5757079 (1998-05-01), McAllister et al.
patent: 5841075 (1998-11-01), Hanson
patent: 5883335 (1999-03-01), Mizumoto et al.
patent: 6127633 (2000-10-01), Kinoshita
patent: 6127634 (2000-10-01), Higashiguchi et al.
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Kim Won-Jae
Kim Yong-Il
Lee Kyu-Won
Alcalá Jose′ H.
Birch & Stewart Kolasch & Birch, LLP
LG Electronics Inc.
Paladini Albert W.
LandOfFree
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