Multi-layer printed circuit board and a method for assuring asse

Details Multi-layer printed circuit board and a method for assuring asse Multi-layer printed circuit board and a method for assuring asse

1990-04-04

1991-04-23

Picard, Leo P.

Electricity: electrical systems and devices

Miscellaneous

361412, H05K 111

Patent

active

050104497

ABSTRACT:
A method for assuring that a multi-layer circuit board has been assembled in a selected order which method incorporates the step of forming a label on each layer of the multi-layer circuit board, with each of the labels having a unique indicia thereon indicative of that layers position in a correctly assembled multi-layer circuit board. Additionally, there is provided the step of forming a transparent area in each layer above the last layer to be viewed, with the size of each transparent area limited to that necessary to view only the indicia of the following correctly assembled layers, such that an incorrectly ordered layer prevents the viewing of at least one indicia. A replication of the labels, commencing from the last ordered layer to the first ordered layer, provides for a doubling in the number of layers that can be checked for correct assembly order.

REFERENCES:
patent: 4461107 (1984-07-01), Grate

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